Boron diffusion in polycrystalline Si-on-single crystal Si systems has been studied by secondary ion mass spectrometry. The extrapolated B-diffusion profiles in polycrystalline Si and in the single crystal Si substrate reveal a discontinuity at the polycrystalline Si-single crystal Si interface. The discontinuity in the B profiles is believed to occur due to the blockage of B-defect complexes by the interfacial oxide between polycrystalline Si and the single-crystal Si substrate, as well as the immobility of these defect complexes in single crystal Si. The B in the implant peak region above the B solid solubility limit is found to be immobile in single crystal Si during annealing due to the formation of electrically inactive B-defect complexes. In polycrystalline Si, however, our results show that the B in the peak region spreads out more rapidly than in single crystal Si possibly due to the diffusion of B-defect complexes along grain boundaries. The B-defect complexes are electrically inactive as determined by spreading resistance analysis. If the B concentration is lowered below the solid solubility limit, either by decreasing the dose or by raising the anneal temperature, no discontinuity is observed in the B profile across the polycrystalline Si-single crystal Si interface.
Hot-carrier stressing has been shown to degrade hydrogen-passivated p-channel polysilicon-on-oxide MOSFET's by two parallel degradation mechanisms. We observe hot-carrier-induced degradation of hydrogen passivation at grain boundaries through the creation of additional donor-type grain boundary states in the channel, as well as hot-electron trapping in the gate oxide. Due to the presence of both of these degradation mechanisms, p-channel polysilicon MOSFET's exhibit anomalous hot-carrier-induced degradation behavior that has not been observed in bulk p-MOSFET's.
In this paper we report on the ability of rapid thermal annealing (1050C, 45s) and furnace annealing (900C, 30min) to partially break up the interfacial oxide in bipolar transistors with different oxide thicknesses at the polysilicon/silicon interface. We have obtained the different oxide thicknesses either by performing different ex situ cleans (RCA clean or RCA clean + HF dip) before Low Pressure Chemical Vapor Deposition (LPCVD) of polysilicon, or by using a cluster tool for polysilicon deposition with the ability to perform an in situ clean and then allowing the growth of different oxide thicknesses at the interface prior to polysilicon deposition. For the in situ cleaned devices, it is observed that after the interface anneal, the current gain increases with increasing oxide thicknesses, but with little penalty in terms of higher emitter resistance, Re. This indicates that by controllably increasing the interfacial oxide thickness and by subsequent annealing to partially break up the interfacial oxide, higher current gains can be obtained with little sacrifice in terms of higher Re.
In the present study we have modeled the diffusion of boron in single crystal silicon from an ion-implanted polysilicon film deposited on a single crystal silicon substrate. Modeling has been done for both BF2 and boron implants in the polysilicon layer. A new phenomenological model for a diffusivity has been implemented in the PEPPER simulation program using an effective concentration-dependent diffusivity approach. The effective diffusivities of boron in single crystal silicon have been extracted using Boltzmann-Matano analysis. The modeling has been implemented for a wide range of furnace anneal conditions (800°C to 950°C, from 30 min. to 6 hours), and implant conditions (BF2 doses varied from 5×1015 to 2×10'16 cm-2 at 70 keV, boron dose of 5×1015 cm-2 at 20 keV).
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