Abstract-A new algorithm based on a SPICE-like simulator that searches for multiple operating points automatically, with no user intervention required, is presented. This algorithm, which exploits the asymmetrical properties of nonlinear mappings that describe multistable circuits, has been implemented into a program which automatically finds multiple (in most cases, all) operating points of a circuit. In addition to finding multiple operating points, this method offers another feature: it is capable of detecting the stability of a particular operating point. Another useful feature of this method is that it allows the user to gauge how close a particular circuit is to possessing multiple operating points. For circuits known to possess multiple operating points, this method allows the user to specify which operating point is encountered first. Unlike other continuation methods, circuit element models are not modified; only augmenting resistors are required. Hence, this approach lends itself well as an "add-on" to existing circuit simulators. A number of circuit examples are given.

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This paper reviews previous theory regarding the existence and uniqueness of dc operating points possessed by bipolar transistor circuits and applies it to MOSFET circuits. Two primary results are presented. First, it is shown that certain previous topological results regarding the uniqueness of dc operating points for bipolar junction transistor and JFET circuits do not strictly hold for MOSFET circuits. Second, a two-transistor MOSFET circuit that possesses five operating points is presented. This circuit is contrasted with previous results that indicate that two-transistor BJT circuits can possess no more than three operating points. The existence of this MOSFET circuit is justified by showing how the previous result breaks down in the case of circuits containing MOSFETs.

It has long been held that no more than three operating points can be possessed by any two-transistor circuit. This belief is based on a result proved for bipolar transistors that has been assumed to hold for field-effect transistors as well. In this paper a counterexample is given: A simple circuit containing two MOSFETs with realistic models that possesses five operating points is presented. The existence of such a circuit is justified by showing how the result mentioned above breaks down in the case of FETs. BACKGROUNDThe existence and uniqueness of operating points possessed by transistor circuits have been the subjects of study for many years [l]. Two of the best-known such results are as follows:Theorem 1 [2] A necessary condition for a circuit to possess multiple operating points is that embedded in its topology is the feedback structure shown in Fig. 1. Figure 1 : Feedback structure.Although Theorem 1 was proved specifically for BJT circuits in [2], it was later shown to hold for circuits containing FETs [3]. Theorem 1 is also noteworthy due to the fact that its validity is independent of the specific p-n junction characteristics; the only assumption is that such characteristics are strictly monotone-increasing. Figure 2: Ebers-Moll transistor model. Theorem 2 [4] Any circuit containing two bipolarjunction transistors can possess no more than three operating points.Although both Theorems 1 and 2 have been considered to be equally valid and general, in fact only Theorem 1 is truly fundamental; as mentioned previously, its validity depends only on the assumption of a very general transistor model. We will show that Theorem 2, on the other hand, is based on a certain approximation that is valid only for a more restrictive transistor model -one that does not necessarily apply to MOSFEiTs.In the next section we present a brief outline of the proof of [4]. In Section 3 we show why this proof does not hold for MOSFETs and then present a simple two-transistor MOS-FET circuit that possesses five operating points. Concluding remarks are given in Section 4. OUTLINE OF LEE'S PROOFIn this section we present a brief summary of the proof given in [4] of the result for two-transistor BJT circuits. Fig. 2, is assumed for the BJTs, hich is characterized by: A standard Ebers-Moll transistor model, shown inwhere the variables il , i 2 , V I , v2 are defined in Fig. 2; current gain coefficients a1 and a2 lie in the half-