No abstract

Multisine excitation is widely used in impedance measurements to retain the advantages of the sine wave, while reducing the measurement time. To keep the crest factor (CF) of the excitation signal low, the initial phases of the signal components must be optimized. This paper focuses in further optimization of multisine signal for improving the signal-to-noise ratio (SNR) of measurements, reducing the complexity of signal generation and minimizing a memory footprint of the FPGA based implementation.

No abstract

No abstract

Two approaches to improve the fault coverage of functional logic BIST in digital circuits are proposed and investigated. The first approach is based on introducing of additional test points. An experimental tool set is developed for fast evaluation of the number of control points that is needed to achieve 100% fault coverage for the given functional test sequence. A novel algorithm is proposed to minimize the number of control points. The second approach is based on complementing the functional test with additional deterministic test patterns. The pros and cons of both approaches are highlighted and discussed.