This paper analyses the effects of single-event transients (SETs) on CMOS low noise amplifiers (LNA) designed for a 0.18 mm technology. Two well-known topologies, the common-source and common-gate cascodes, have been analysed when heavy ions strike the most sensitive nodes of these structures. In order to simulate these strikes both a physics-based technology computer aided design (TCAD) tool and an electrical circuit domain simulator have been used. This way the physics information given by the TCAD tool is combined with the fast transient simulations performed in circuit simulators. To study their SET performance, the maximum voltage peak and the recovery time of the output signal were calculated for both LNAs. Additionally, a safe operating area can be defined, setting the boundaries for acceptable SETs. Radiation hardening by design techniques have been applied at the most vulnerable nodes of both LNAs. The proposed mitigation approaches make both LNAs hardened against radiation, considerably improving their SET performance.

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In this paper, an area-efficient 4-stage dual-fed distributed power amplifier (DPA) implemented in a 0.35 μm Complementary Metal Oxide Semiconductor (CMOS) process is presented. To effectively reduce the area of the circuit, techniques such as using multilevel inductors and closely-placing conventional spiral inductors are employed. Additionally, a novel technique based on stacking inductors one on top of others is implemented. Based on these techniques, a 32% area reduction is achieved compared to a conventional design without a noticeable performance degradation. This reduction could be further exploited as the number of stages of the dual-fed DPA increases.

In this paper, a Wide-band CMOS low-noise amplifier (LNA) based on Current Conveyors (cq is presented, in which the thermal noise of the input MOSFET is cancelled by exploiting a noise-cancelling technique. This new LNA offers the following notable advantages over existing topologies: wideband performance, with a stable frequency response from 0 to 6.2GHz and wideband input matched impedance with a total absence of passive elements; a low Noise Figure (NF) and high linearity. Comparisons with other topologies prove the effectiveness of the new implementation.

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