Summary A digital‐ramp hybrid exponential‐linear analog‐to‐digital converter (ADC) is presented in this paper, which is attractive, where a high dynamic range (DR) is required. It is especially applicable for sampling neural (bio‐potential) signals, as most of the neural signal data are concentrated on higher side of the amplitude range. By the exponential quantization function for low signal amplitudes, the background noise that disperses in lower amplitudes will be reduced. For higher signal amplitudes, the exponential function optionally switches to linear function at an adjustable voltage threshold, to reduce required number of bits for those high amplitudes, as well. As a result of this exponential‐linear hybrid operation, the total data rate and the power required for data transmission are decreased. A prototype 8‐bit counter‐based exponential ADC is designed and simulated in 0.18‐μm complementary metal‐oxide‐semiconductor (CMOS). The 20‐KS/s ADC achieves a DR of 66 dB, occupies 0.036 mm2 area, and consumes 6.4‐μW power from a 1.8‐V supply. Integral nonlinearity (INL) and differential nonlinearity (DNL) that are redefined to be compatible with nonlinear ADCs are 3.2 and 0.88 least significant bits (LSBs), respectively.

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