Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.

Memristors were vertically integrated with CMOS circuits using nanoimprint lithography (NIL), making a transistor/memeristor hybrid circuit. Several planarization technologies were developed for the CMOS substrates to meet the surface planarity requirement for NIL. Accordingly, different integration schemes were developed and optimized. UV-curable NIL (UV-NIL) using a double layer spin-on resists was carried out to pattern the electrodes for memristors. This is the first demonstration of NIL on active CMOS substrates that are fabricated in a CMOS fab. Our work demonstrates that NIL is compatible with commercial IC fabrication process. It was also demonstrated that the memristors are integratable with traditional CMOS to make hybrid circuits without changing the current infrastructure in IC industry.

Direct sensing in liquids using CMOS-integrated optical and electrical sensors is attractive for lab-on-chip applications, where close physical proximity between sample and sensor can obviate optical lenses, enhance electrical sensitivity, and decrease noise due to parasitics. However, controlled delivery of fluid samples to the chip surface presents an ongoing challenge for lab-on-CMOS development, where traditional wire-bond packaging prevents integration of planar microfluidics. In this paper, we present a method for scalable heterogeneous integration of microfluidic channels and silicon-integrated circuit substrates using a commercial fan-out wafer-level packaging approach. The planar surface supports multiple approaches for fluidic integration; we present both a stacked laser-cut fluidic assembly and the fabrication of monolithic SU-8 microchannels over the IC surface. As a proof-of-principle, both electrical and fluidic routing are provided to a custom 0.18-m CMOS optical sensor IC, and optical transmission and fluorescence measurement experiments are demonstrated.

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