Extreme temperature semiconductor integrated circuits (ICs) are being developed for use in the hot sections of aircraft engines and other harsh‐environment applications well above the 300 °C effective limit of silicon‐on‐insulator IC technology. This paper reviews progress by the NASA Glenn Research Center and Case Western Reserve University (CWRU) in the development of extreme temperature (up to 500 °C) integrated circuit technology based on epitaxial 6H‐SiC junction field effect transistors (JFETs). Simple analog amplifier and digital logic gate ICs fabricated and packaged by NASA have now demonstrated thousands of hours of continuous 500 °C operation in oxidizing air atmosphere with minimal changes in relevant electrical parameters. Design, modeling, and characterization of transistors and circuits at temperatures from 24 °C to 500 °C are also described. CWRU designs for improved extreme temperature SiC JFET differential amplifier circuits are demonstrated. Areas for further technology maturation, needed prior to beneficial system insertion, are discussed. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

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This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 °C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over ~ 1-μm scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 °C operational testing. These results advance the technology foundation for realizing long-term durable 500 °C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

This work describes recent progress in the design, processing, and testing of significantly up-scaled 500 °C durable 4H-SiC junction field effect transistor (JFET) integrated circuit (IC) technology with two-level interconnect undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for over one year at 500 °C in air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more than 7-fold increase in 500 °C-durable circuit complexity from the 24 transistor ring oscillator ICs reported at HiTEC 2016 [1]. These results advance the technology foundation for realizing long-term durable 500 °C ICs with increased functional capability for combustion engine sensing and control, planetary exploration, deep-well drilling monitoring, and other harsh-environment applications.