Articles you may be interested inAnalysis of an anomalous hump in gate current after dynamic negative bias stress in HfxZr1-xO2/metal gate pchannel metal-oxide-semiconductor field-effect transistors Appl. Phys. Lett. 101, 052105 (2012); 10.1063/1.4739525 Inversion-channel GaN metal-oxide-semiconductor field-effect transistor with atomic-layer-deposited Al 2 O 3 as gate dielectric Appl. Phys. Lett. 93, 053504 (2008); 10.1063/1.2969282The positive bias temperature instability of n -channel metal-oxide-semiconductor field-effect transistors with Zr O 2 gate dielectric Electrical characteristics and reliability properties of metal-oxide-semiconductor field-effect transistors with Dy 2 O 3 gate dielectric Metal-oxide-semiconductor capacitors and metal-oxide-semiconductor field-effect transistors with ZrO 2 gate dielectric were fabricated. The time dependent dielectric breakdown ͑TDDB͒ of ZrO 2 capacitors was studied. It was observed that the Weibull slopes were independent of the capacitor area. The Weibull slopes had no clear dependence on ZrO 2 thickness. The TDDB of ZrO 2 follows the E model. The activation energy E a was linearly dependent on the electric field and the field acceleration parameter ␥ is independent of temperature.

Stress migration ͑SM͒ and electromigration ͑EM͒ were widely used to study the performance of interconnection process of metal/via formation in copper dual damascene of wafers. Necking and voids at the via bottom were important in causing failures in tests of stress migration and electromigration. In this report, the contamination of the bottom of via, which results in poor step coverage, the adhesion of seed layers, and poor copper grain formation are identified to be the underlying causes of the necking and void formation after the first EM and SM tests are performed. The contamination of the via formation processes included via etching, trench etching, and barrier/seed layer depositions. A well-shaped via profile can be optimized using three methods, the first involves Cu/SiN interface stress, the second involves Cu grain growth, and the third involves post via etching clean study. Eliminating the contamination of the via bottom and optimizing step coverage and adhesion of the barrier seed layers improve the EM and SM performance from time-to-fail ϭ 13 to 59 s, in the copper-related processes for fabricating 300 mm wafers using technology that is beyond 0.13 m technology.

Al/ZrO 2 /p-Si metal-insulator-semiconductor capacitors were fabricated. The ZrO 2 films were deposited by radio frequency magnetron sputtering. The X-ray photoelectron spectroscopy analysis shows the silicate interfacial layer formed between ZrO 2 and Si. The hysteresis and the density of positive oxide trapped charges of the capacitors from capacitance-voltage measurement were 230 mV and 8.8 ϫ 10 11 cm −2 , respectively. The equivalent oxide thickness of ZrO 2 was estimated to be 5.6 nm. The typical dielectric constant of 11.1 was calculated. With the A1 electrode biased negative, the conduction mechanism in the electrical field below 0.25 MV/cm and in the temperature range 375 K Ͻ T Ͻ 450 K was found to be ohmic emission. A model of thermally excited and hopping electrons was proposed to explain the mechanism of ohmic conduction current.In recent years, high-k dielectrics have attracted great attention for the advantaged property of high dielectric constant. Zirconium oxide ͑ZrO 2 ͒ is considered as a potential replacement of SiO 2 due to its high dielectric constant ͑20-25͒, 1-4 large energy bandgap ͑5.4 eV͒, high breakdown electric field ͑7-15 MV/cm͒, and low leakage current level. 2-4 The conduction mechanism in ZrO 2 thin films is an important subject for these applications. Chim et al. 5 found that the conduction mechanism for an Al/ZrO 2 /n-Si capacitor was PooleFrenkel emission in the electrical field between 2.0 and 3.2 MV/cm under positive gate bias. A barrier height of the interface of ZrO 2 and Si was 1.4 eV, calculated from a curve fitting of current density vs. electric field. Yamaguchi et al. 6 reported the conduction mechanism of Poole-Frenkel emission and measured the trap barrier height. The trap barrier height on the interface of ZrO 2 and Si was 1.0 and 1.5 eV, obtained by applying a positive gate voltage and X-ray photoelectron spectroscopy ͑XPS͒, respectively. Chang and Lin 7 showed that the conduction mechanism was dominated by Schottky emission at low electric field and by Poole-Frenkel emission at high electric field.In our previous work, 8 with the Al electrode biased negative, the conduction mechanism in the electrical field of 0.81 MV/ cm Ͻ E Ͻ 1.40 MV/cm and in the temperature range of 375 K Ͻ T Ͻ 450 K is found to be modified Schottky emission. The intrinsic barrier height between Al and ZrO 2 is 1.06 eV. At higher electrical fields of 1.50 MV/cm Ͻ E Ͻ 2.25 MV/cm and higher temperatures of 375 K Ͻ T Ͻ 450 K, the electrical conduction is dominated by modified Poole-Frenkel emission. The extracted trap level is 0.83 eV.In this present work, with the Al electrode biased negative, the conduction mechanism at lower electric field ͑Ͻ0.8 MV/cm͒ is further studied. The ohmic emission is considered due to a strong dependence on applied electric field and temperature. Furthermore, material properties are investigated by X-ray photoelectron spectroscopy ͑XPS͒ analysis. The electrical measurements, including current-voltage ͑I-V͒ and capacitance-voltage ͑C-V͒ characteristics, are performed on ...