Electronic products are evolving towards miniaturization, high integration, and multi-function, which undoubtedly puts forward higher requirements for the reliability of solder joints in electronic packaging. Approximately 70% of failure in electronic devices originates during the packaging process, mostly due to the failure of solder joints. With the improvement of environmental protection awareness, lead-free solder joints have become a hot issue in recent years. This paper reviews the research progress on the reliability of lead-free solder joints and discusses the influence of temperature, vibration, tin whisker and electromigration on the reliability of solder joints. In addition, the measures to improve the reliability of solder joints are analyzed according to the problems of solder joints themselves, which provides a further theoretical basis for the study of the reliability of solder joints of electronic products in service.
With the development of lead-free solders in electronic packaging, Sn-Cu lead-free solder has attracted wide attention due to its excellent comprehensive performance and low cost. In this article, we present recent developments in Sn-Cu lead-free solder alloys. From the microstructure and interfacial structure, the evolution law of the internal structure of solder alloy/ solder joint was analysed, and the model and theory describing the formation/growth mechanism of interfacial IMC were introduced. In addition, the effects of alloying, particle strengthening and process methods on the properties of Sn-Cu lead-free solders, including wettability, melting and mechanical properties, were described. Finally, we outline the issues that need to be resolved in the future research. This figure presents the interface morphology of Sn-Cu-Ni-xPr joint. (a) x = 0, (b) x = 0.05wt%. It was clear that with the addition of 0.05% Pr, the thickness of IMC layer decreases significantly and the formation of voids at the interface is inhibited.
Purpose
The transistor circuit based on Moore's Law is approaching the performance limit. The three-dimensional integrated circuit (3-D IC) is an important way to implement More than Moore. The main problems in the development of 3-D IC are Joule heating and stress. The stresses and strains generated in 3-D ICs will affect the performance of electronic products, leading to various reliability issues. The intermetallic compound (IMC) joint materials and structures are the main factors affecting 3-D IC stress. The purpose of this paper is to optimize the design of the 3-D IC.
Design/methodology/approach
To optimize the design of 3-D IC, the numerical model of 3-D IC was established. The Taguchi experiment was designed to simulate the influence of IMC joint material, solder joint array and package size on 3-D IC stress.
Findings
The simulation results show that the solder joint array and IMC joint materials have great influence on the equivalent stress. Compared with the original design, the von Mises stress of the optimal design was reduced by 69.96 per cent, the signal-to-noise ratio (S/N) was increased by 10.46 dB and the fatigue life of the Sn-3.9Ag-0.6Cu solder joint was increased from 415 to 533 cycles, indicating that the reliability of the 3-D IC has been significantly improved.
Originality/value
It is necessary to study the material properties of the bonded structure since 3-D IC is a new packaging structure. Currently, there is no relevant research on the optimization design of solder joint array in 3-D IC. Therefore, the IMC joint material, the solder joint array, the chip thickness and the substrate thickness are selected as the control factors to analyze the influence of various factors on the 3-D IC stress and design. The orthogonal experiment is used to optimize the structure of the 3-D IC.
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