Organic passivated silicon wafers, composite substrates such as silicon on glass or Fan-out Wafer-Level Package (FOWLP) technology all pose new challenges for UBM and RDL processes [1]- [5]. Materials used in these substrates must be adequately degassed for subsequent plasma processing under vacuum but their heat-sensitive nature necessitates careful thermal management. Selecting the proper technology for each individual step enables the definition of a high yield process, minimizing contamination from the organic materials. This paper discusses the preferred degas principles for different substrates and applications. Temperature simulation data and experimental results are presented for various heating methods including single wafer and batch processes. It illustrates the effectiveness of an atmospheric batch degasser for removal of volatile water and organic compounds (VC) at moderate temperatures below 150°C. The results will be compared with standard vacuum degas technologies and the resulting contact resistance (Rc) values after subsequent low temperature ICP etch will be reported. The paper also addresses the etch process requirements to ensure efficient pumping of remaining volatile contaminants, the required temperature management of the substrates and the particle containment and cleanliness of the process environment.

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The barrier and seed layers for electroplating of copper play a critical role in the realization of through silicon vias (TSV) in 3D IC packaging. Physical vapour deposition (PVD) is still the preferred method for depositing these films, but must meet the technical challenges presented by the need to line high aspect ratio vias of 10:1 or more that often have rough sidewalls, and the market demand of low cost. A bilayer of TaNx/ α-Ta is the preferred diffusion barrier for copper metallization in CMOS multilevel damascene structures, providing a good adhesion and wetting layer for the PVD copper seed layer. A new method called Highly Ionized Sputtering (HIS) has been developed using power pulses of 50 to 200μsec length with a low duty cycle but very high peak current of several hundred amps. The high pulse current generates a very high ionization fraction of the sputtered material giving – with an appropriate bias voltage applied to the wafer – a high directionality of metal ions and providing very dense films as needed for the diffusion barrier. HIS uses regular sputtering equipment, planar targets and works at low target-to-substrate distances thus providing excellent transfer factors of the ionized PVD material, resulting in high target utilization and a low cost of ownership. HIS hardware and processes with competitive deposition rates, good uniformities and low stress have been developed on the Oerlikon 200mm and 300mm PVD cluster tools for TaNx, Ta, Ti and Cu. The applicability has been verified experimentally in TSVs with different sidewall qualities and supported by simulations.

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