GaN is an attractive wide bandgap semiconductor for power applications, owing to its superior electrical properties, such as high critical electric field and saturation drift velocity. Recent advancements in developing native GaN substrates has drawn attention toward exploring vertical GaN power diodes with high breakdown voltages (V BR). In practice, effective edge terminations techniques, such as junction termination extension (JTE) structures, play a crucial role in realizing high-voltage devices. Though certain challenges in fabricating GaN diodes, such as difficulty in forming p-type region, makes it difficult to realize edge termination, hence impeding the development and adoption of such devices. This paper aims to address these challenges by presenting the design and methodology of forming multi-zone, counterdoped JTE structures in vertical GaN diodes, which attains close to theoretical breakdown voltage for a wide range of tolerance in implant dose variation. Extensive device simulations using experimental data and including the effects of surface charges and implant profiles, are performed to present realistic results. The results suggest that >80% of ideal V BR is achievable for a wide range of doping concentration (2.4 × 10 17 cm −3) with a maximum V BR reaching 96% of the ideal value. This paper serves as the first step toward leveraging the current challenges in the fabrication of GaN diodes, by proposing optimum design techniques for realizing vertical GaN diodes with high breakdown voltages. INDEX TERMS GaN, vertical diodes, breakdown voltage, junction edge termination (JTE), counter-doping, partial compensation, multi-zone JTEs (MZJTEs).

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Gallium nitride (GaN) is a promising candidate for power applications, due to its superior electrical properties such as high critical breakdown field and saturation drift velocity. The recent emergence of GaN substrates with low defect densities has made it feasible to develop efficient vertical GaN power diodes. However, the breakdown voltage of these diodes is far from the theoretical value, due to the lack of suitable edge termination techniques in GaN such as junction termination extension (JTE). This is attributed to the processing challenges in fabricating GaN power diodes where it is difficult to form p-type regions through implantation. This work addresses this challenge and proposes the design, optimization, and a comprehensive design methodology for implantation-free, edge termination techniques such as field plate (FP), single and multi-etch JTE, and a hybrid FP-JTE structure, suitable for vertical GaN diodes. The proposed approaches demonstrate that close to theoretical breakdown voltages (>80%) are achievable, with greater area efficiency, simple processing, and high tolerance in process variation.

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