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In this research work, we have presented an iterative joint source channel decoding- (IJSCD-) based wireless video communication system. The anticipated transmission system is using the sphere packing (SP) modulation assisted differential space-time spreading (DSTS) multiple input-multiple output (MIMO) scheme. SP modulation-aided DSTS transmission mechanism results in achieving high diversity gain by keeping the maximum possible Euclidean distance between the modulated symbols. Furthermore, the proposed DSTS scheme results in a low-complexity MIMO scheme, due to nonemployment of any channel estimation mechanism. Various combinations of source bit coding- (SBC-) aided IJSCD error protection scheme has been used, while considering their identical overall bit rate budget. Artificial redundancy is incorporated in the source-coded stream for the proposed SBC scheme. The motive of adding artificial redundancy is to increase the iterative decoding performance. The performance of diverse SBC schemes is investigated for identical overall code rate. SBC schemes are employed with different combinations of inner recursive systematic convolutional (RSC) codes and outer SBC codes. Furthermore, the convergence behaviour of the employed error protection schemes is investigated using extrinsic information transfer (EXIT) charts. The results of experiments show that our proposed R a t e − 2 / 3 SBC-assisted error protection scheme with high redundancy incorporation and convergence capability gives better performance. The proposed R a t e − 2 / 3 SBC gives about 1.5 dB E b / N 0 gain at the PSNR degradation point of 1 dB as compared to R a t e − 6 / 7 SBC-assisted error protection scheme, while sustaining the overall bit rate budget. Furthermore, it is also concluded that the proposed R a t e − 2 / 3 SBC-assisted scheme results in E b / N 0 gain of 24 dB at the PSNR degradation point of 1 dB with reference to R a t e − 1 SBC benchmarker scheme.

CMOS current readout is a critical circuit block for various applications like bio-sensing. This paper presents an overview of CMOS current readout techniques and analyze their merits and demerits, including noise floor, sensitivity, and achievable system bandwidth. Mainly, the practical applicability of individual technique/design for integrated low-noise bio-sensing applications is discussed. To present a thorough insight of the state-of-the-art, most recent and relevant articles published in the literature related to the current sensing interface are summarized and compared. The paper identified the primary DC current rejection schemes, where each approach and its limitations are discussed and shown that each system comes with its limits.

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