In this study, a novel split-gate lateral double-diffused metal oxide semiconductor field effect transistor with double vertical field plates (SG DVFP LDMOS) is proposed. The first feature of the SG DVFP LDMOS is that the SG with gradient gate oxide is introduced. The SG not only optimises the bulk electric field distributions to increase the breakdown voltage (BV) but also reduces the gate-drain charge (Q GD) owing to the thick gate oxide. The second feature of the SG DVFP LDMOS is the presence of the DVFP and P-pillar. They modulate the bulk electric field distributions and assist to deplete the drift region. So the specific on-resistance (R on,sp) is decreased and the BV is improved. The source vertical field plate reduces the contact region between the gate and drain, thereby the Q GD is reduced. Compared with the conventional SG LDMOS and rectangle-gate DVFP LDMOS, the figure of merit FOM1 of SG DVFP LDMOS is increased by 123.2 and 86.6%, and the loss figure of merit FOM2 is enhanced to 16.9 and 37.2%. Simultaneously, the key process steps of the SG DVFP LDMOS are proposed.

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A novel double trenches lateral double diffused metal oxide semiconductor with trapezoidal gate (TGDT LDMOS) is proposed. One feature of the device is that two dielectric trenches which are equivalent to two field plates are introduced in the drift region. The two dielectric trenches not only modulate the body electric field to improve the breakdown voltage (BV) of the device but also assist to deplete the drift region to reduce the specific on-resistance (R on,sp). The other feature is the presence of the trapezoidal gate which increases the gate oxide thickness to reduce the capacitance of gate and drain (C GD). Thereby the charge between the gate and drain (Q GD) is reduced, so that the conduction loss of the device is decreased. Compared with the conventional LDMOS with trapezoidal gate and the single trench LDMOS with trapezoidal gate, the figure of merit (FOM = BV 2 /R on,sp) of the TGDT LDMOS is increased by 112.5 and 54.5%, respectively. Compared with the conventional double trenches LDMOS with rectangle gate, the FOM is similar, but the Q GD is reduced by 45.7%. Simultaneously, the feasible process steps of the TGDT LDMOS are given in this work.

We present intensity distributions of a supercontinuum laser passing through an apertured dispersion lens and find focal shift effects generated. The results show that, apart from the conventional negative focal shift, a positive focal shift also appears in the supercontinuum laser. The maximum intensity of the supercontinuum laser shifts toward the lens when the truncated parameter is small. However, it exceeds the focus of the central wavelength and a positive focal shift appears in the supercontinuum laser with large truncated parameter. Both of the maximum intensities shift away from the focus when the bandwidth of the supercontinuum laser increases, while the shift direction is opposite. No focal shift appears when the bandwidth and the truncated parameter satisfy some conditions.

A novel voltage-withstand substrate with high-K (HK, k > 3.9, k is the relative permittivity) dielectric and low specific on-resistance (R on,sp ) bulk-silicon, high-voltage LDMOS (HKLR LDMOS)is proposed in this paper. The high-K dielectric and highly doped interface N + -layer are made in bulk silicon to reduce the surface field drift region. The high-K dielectric can fully assist in depleting the drift region to increase the drift doping concentration (N d ) and reshape the electric field distribution. The highly doped N + -layer under the high-K dielectric acts as a low resistance path to reduce the R on,sp . The new device with the high breakdown voltage (BV ), the low R on,sp , and the excellent figure of merit (FOM = BV 2 /R on,sp ) is obtained. The BV of HKLR LDMOS is 534 V, R on,sp is 70.6 mΩ•cm 2 , and FOM is 4.039 MW•cm −2 .