Virtualized Reality is a modeling technique that constructs full 3D virtual representations of dynamic events from multiple video streams. Image-based stereo is used to compute a range image corresponding to each intensity image in each video stream. Each range and intensity image pair encodes the scene structure and appearance of the scene visible to the camera at that moment, and is therefore called a Visible Surface Model (VSM). A single time instant of the dynamic event can be modeled as a collection of VSMs from different viewpoints, and the full event can be modeled as a sequence of static scenes -the 3D equivalent of video. Alternatively, the collection of VSMs at a single time can be fused into a global 3D surface model, thus creating a traditional virtual representation out of real world events. Global modeling has the added benefit of eliminating the need to hand-edit the range images to correct errors made in stereo, a drawback of previous techniques.Like image-based rendering models, these virtual representations can be used to synthesize nearly any view of the virtualized event. For this reason, this paper includes a detailed comparison of existing view synthesis techniques with our own approach. In the virtualized representations, however, scene structure is explicitly represented and therefore easily manipulated, for example by adding virtual objects to (or removing virtualized objects from) the model without interfering with real event. Virtualized Reality, then, is a platform not only for image-based rendering but also for 3D scene manipulation.

An abundance of TeSeaTCh efforts in low power logic synthesis have so far been focused on AND/OR OT NAND/NOR based logic. A typical approach is to first generate an initial multi-level A N D / O R OT NAND/NOR representation of a boolean function. Next, the representation is optimized in terms of power. However, there are major classes of circuits such as arithmetic functions which have sizable AND/OR representations but have very compact AND/XOR representations. FOT these functions AND/OR based optimization approach often yields poor results. I n this paper, we put forth a paradigm for low power logic synthesis based on AND/XOR representations of boolean functions. Specifically, we propose transforming a boolean function into a Fired Polarity Reed Muller form that allows us to efficiently synthesize X O R trees and AND trees with PTOVably minimum switching activity. Preliminary experim e n t d results show that we attain good power savings with negligible area overhead and often area reduction when compared to conventional AND/XOR based synthesis methods and the Berkeley SIS system.

Varicella infection is caused by varicella-zoster virus (VZV) and commonly presents as a self-limiting skin manifestation in children. VZV also causes cerebral arterial vasculopathy and antibody-mediated hypercoagulable states leading to thrombotic complications in children, although there are very few such reports in adults. Postulated causal factors include vasculitis, direct endothelial damage, or acquired protein S deficiency secondary to molecular mimicry. These induced autoantibodies to protein S could lead to acquired protein S deficiency and produce a hypercoagulable state causing venous sinus thrombosis. Here we report the case of a 26-year-old man who presented with cortical venous sinus thrombosis and acute pulmonary embolism following varicella infection. Both conditions responded to anticoagulation treatment.LEARNING POINTSVaricella infection caused by varicella-zoster virus (VZV) can rarely present with thrombotic complications after a period of latency.Postulated causal factors include vasculitis, direct endothelial damage, and acquired protein S deficiency secondary to molecular mimicry.The prognosis of post-varicella thrombosis is good, but a prothrombotic screen after recovery to diagnose hereditary prothrombotic states is advisable.

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This thesis presents a vertical handover decision (VHD) scheme for optimizing the efficiency of vertical handover processes in the Fourth Generation (4G) heterogeneous wireless networks. The scheme consists of three closely integrated modules: Handover necessity estimation, handover target selection, and handover triggering condition estimation. Handover necessity estimation module determines whether a handover is necessary to an available network. Handover target selection module chooses the "best" network among the available candidates based on a set of criteria. Finally, handover triggering condition estimation module determines the right moment to initiate a handover out of the currently connected network.4G wireless networks are expected to support mechanisms for tight integration and cooperation of divergent access network technologies. In such networks of heterogeneous nature, roaming users will experience frequent handovers across network boundaries. Thus, to ensure seamless roaming and efficient resource usage over dissimilar networks, intelligent VHD algorithms need to be used extensively. The research project presented in this thesis report focuses on this problem and provides an optimized VHD scheme, which minimizes the handover failures, unnecessary handovers and connection breakdowns whilst maintaining users' satisfaction at high levels. In addition, the scheme also provides mechanisms for mobile applications to control the tradeoff between the usage of the preferred access network and number of handovers or connection breakdowns.Simulation based performance evaluations demonstrate that the scheme reduces the number of handover failures, unnecessary handovers and connection breakdowns by up to 80%, 70% and 70%, respectively. They also show an increase of up to 50% in the satisfaction level of users.