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In this paper, two techniques, called Stage-Outphasing (SO) and Multiphase Soft-Charging (MSC), are introduced, that make use of the advanced multiphasing concept to soft-charge charge transfers between flying capacitors. As such, the charge sharing losses of fully integrated switched-capacitor (SC) converters are reduced, leading to better capacitance utilization, higher efficiency and higher power-density. Furthermore, when used in combination with the Dickson converter, the relative improvement gets better with increasing voltage conversion ratio, making them an excellent choice to reduce power delivery network-induced losses in modern microchips. The impact of the proposed techniques on the performance are discussed. A 3:1 Dickson SC converter is realized that implements SO and MSC, and achieves a state-of-theart 1.1W/mm 2 power-density, 82% efficiency combination using common capacitor technologies. Finally, two figure of merits for monolithic SC DC-DC converters are proposed that include the voltage conversion ratio and power density, to allow fair comparison of the converter's performance to literature.

This paper introduces a technique, called Scalable Parasitic Charge Redistribution (SPCR), that reduces the parasitic Bottom-Plate (BP) losses in fully-integrated Switched-Capacitor (SC) voltage regulators up to any desired level. This is realized by continuously redistributing parasitic charge in-between phase-shifted converter cores. Because earlier models described the ratio of this parasitic coupling to the flying capacitance as the only limiting factor on the achievable fully-integrated efficiency, the use of SPCR allows SC converters to achieve efficiencies previously deemed impossible. Transistor leakage is shown to be another limiting factor and is added to existing models which are then used to prove the effectiveness of SPCR over a wide range of power densities (up to 10W/mm 2) and technological parameters. The implementation of SPCR requires little overhead thanks to the use of Charge Redistribution Buses. A 1/2 converter is fabricated in a 40nm bulk CMOS technology that demonstrates SPCR by achieving a record efficiency for fully-integrated closed-loop SC converters of 94.6%.

When hardware is free, power is expensive! Is integrated power management the solution?

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