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A two-level control store can reduce storage requirements of microprograms without affecting microprogrammability, which is important for a processor programmed directly in microcode. This paper presents a case study investigating how to use a two-level control store effectively. The study is based on Warp cell, a high-performance, microprogrammable processor used in a systolic array computer called Warp. Warp cell is programmed directly in microcode by an optimizing compiler and uses wide horizontal microinstructions with over 200 bits.Two methods which can increase the effectiveness of using a two-level control store have been considered. First, control store configuration can be adjusted so that the storage of an instruction can be partitioned among microstore and one or more nanostores to maximize storage efficiency. Second, it is possible to increase storage reduction of microprograms by exploiting insignificant and symmetric fields in instructions in mapping microprograms to the control store. It has been found that the average storage reduction for Warp cell programs can be increased from 41% in a straightforward two-level control store implementation to 72% by using these methods.

Multicomputersbuiltaround a general network are now a viable alternative to multicomputersbased on a system-speci~c interconnect because of architectural improvements in two areas. First, the host-network interface overhead can be minimized by reducing copy operations and host interrupts. Second, the network can provide high bandwidth and low latency by using high-speed crossbar switches and efficient protocol implementations.While still enjoying thejexibility of general networks, the resulting network-based multicomputers achieve high performance for typical multicomputer applications that use system-specijic interconnects. We have developed a network-based mtdticomputer called Nectar that supports these claims.This paper argues that it is feasible to build highperformance network-based multicomputers that use general networks instead of system-specific interconnects. Such a multicomputer is able to use em"sting hosts, including workstations and special-purpose processors, as its processors. While enjoying a high degree of flexibility, the underlying network can have performance comparable to that of a dedicated interconnect. This is true both for large messages,where bandwidth is important, and for small messages, where software overhead is typically the limiting factor. As a result, the types of applications that run on existing mult.icomputers also run efficiently on network-based multicomputers. At the same time, network-based multicomputers are able to take advantage of rapid advances in network and processor technology.The Nectar project is one of the fist attempts to build a high-performance network-based multicomputer. Nectar is composed of a high-bandwidth crosspoint network and dedicated network coproeessors. A prototype system using 100 Mb/s (megabits per seeond) links has been operational since early 1989. The system has currently 26 hosts, including a connection to a CRAY Y-MP via a 26 kilometer singlemode fiber link. The Nectar prototype has been used as a vehicle to study architectural issues in network-based multicomputers and high-speed networks. This paper is based on insights and experiences gained from the Nectar prototype.To further pursue our ideas, we are collaborating with an industrial partner (Network Systems Corporation) to develop a gigabit Nectar system capable of sustaining gigabit per second end-to-end communication.This new system will support the 800 Mb/s HIPPI (High-Performance Parallel Interface) ANSI standard, and will also have a SONET/ATM 664