Optically transparent, electrically conductive n-Si/n-GaAs direct wafer bonds are achieved by athorough optimization of surface conditioning using fast atom beams. Bonding at room temperature under high-vacuum conditions is systematically investigated after in situ surface deoxidization using either argon or helium fast atom beams. Using argon, high bond energies of up to 900 mJ/m2 areobtained and further enhanced to achieve bulk strength through rapid annealing at 290 C, thereby enabling the production of thermally stable and mechanically robust hybrid substrates. Moreover, the interface conductivity is significantly improved by an additional thermal annealing at 400 C. Although it is anticipated to induce higher quality interfaces, helium treatment yields, however, limited and unstable bonding. This difference is attributed to an important surface nano-texturing that occurs during fast atom beam processing, a phenomenon that is peculiar to helium and absent in argon treatment

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Heterointegration of thin layers obtained from freestanding GaN wafers by the Smart-Cut process faces major challenges due to strong wafer bowing. The post-implantation bow was found to range between ϳ40 and 60 m for 2 in. wafers, prohibiting any bonding of H-implanted GaN. Here, we demonstrate that stress engineering by back-side implantation is an effective strategy to manipulate the bow to meet the criterion of long-range flatness. Based on our approach, high-quality bonding of a 2 in. freestanding GaN wafer onto sapphire was achieved. An efficient method to transfer thin layers from freestanding GaN is proposed.Light-emitting diode ͑LED͒ solid-state lighting is one of the strategies toward achieving the reduction of greenhouse gas emissions and energy consumption. GaN and related material heterostructures have been the building blocks of LED-based devices. 1 These heterostructures also provide a wide spectrum of applications in data communications, sensing, optoelectronics, and biophotonics. However, the potential of these devices is still limited by the quality of the grown materials. Presently, GaN used in device fabrication is epitaxially grown on sapphire despite its poor lattice and thermal match to GaN. The densities of misfit and threading dislocations in GaN layers deposited on sapphire range typically from 10 8 to 10 10 cm −2 , whereby the efficiency of GaN devices is limited. High-quality GaN bulk substrates can be produced by hydride vapor-phase epitaxy growth of thick GaN layers on foreign materials 2 and subsequent separation from the substrate. The current cost of these freestanding ͑fs-͒GaN wafers is still so high that the concept of transfer of several layers from one fs-GaN wafer to appropriate host substrates by the ion-cut process 3 is technologically and economically highly attractive. The most critical step in this process has to do with wafer bonding. Several surface imperfections and flatness deviations of the fs-GaN wafer ͑so-called device wafer in general͒ can limit the bonding to small areas or even forbid the direct and spontaneous wafer-bonding process and can negatively affect the thin-layer splitting process. 4 One of the major problems faced in direct bonding of 2 in. fs-GaN wafers is the strong enhancement of the bow due to H implantation. 5 In this work, we present an approach to manipulate the implantation-induced bowing phenomenon. By strain engineering at the back side of the H-implanted fs-GaN wafer, we reduced the post-implantation bow to meet the bonding criterion of long-range flatness. Consequently, high-quality wafer bonding of the H-implanted 2 in. fs-GaN wafers to sapphire handle wafers was achieved. Based on our approach, we present an efficient and cost-effective process for fs-GaN bonding and, ultimately, layer transfer. This article focuses specifically on different issues related to the bonding process. The optimization of postbonding steps and characterization of the transferred layers will be addressed elsewhere.Experimental ϳ300 m thick 2 in. double-side pol...

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We present an overview of the implantation‐induced blistering/exfoliation process in wide bandgap semiconductors such as GaN, AlN and ZnO. These semiconductors were implanted with 50 keV hydrogen ions at various fluences and subsequently annealed at higher temperatures up to 800 °C in order to trigger surface blistering. In the case of GaN and AlN, a detailed blistering kinetics investigation was also performed. Various techniques such as optical microscopy, atomic force microscopy, cross‐sectional transmission electron microscopy and stylus profilometry were used for the characterization of the implanted samples. In the case of room temperature implanted samples, it was observed that the damage band formed inside the samples was decorated with hydrogen filled nanovoids. These nanovoids served as precursors for the formation of two‐dimensional extended defects called nanocracks and microcracks upon annealing and eventually led to surface blistering or exfoliation. (© 2010 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)