Atisrroct -High voltagc integrated circuits (HVIC's) are emerging as viable altcrnatives to discrctc circuits in a wide variety of applications. A commonly used High Voltage component of these circuits is the lateral double diffused MOS transistor (LDMOS). The LDMOS transistor is based an the lightiy doped drain concept. Two of the main objcctives in designing LDMOS devices are to minimize the an-resistance wtiilc still maintaining a high breakdown voltagc. Attempts to model LDMOS devices arc complicatcd by the existcnce of thc ligbtly doped drain and by the cxtcnsion of the gate oxide and polysilicon beyond the channel into this region. This lightly doped drain region can have a large effect on tlie on-resistance, saturation current and feedback capacitance of the dcvice. This paper will present a LDMOS device, consider some of the key specific parameters related to LDMOS devices, discuss a sub-circuit SPICE tnodcl implemented to modcl the LDMOS ctinracteristics and invcstigate some interconnect metellization cffects.

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