22FDX TM is the industry's first FDSOI technology double-patterning steps required at the 16/14nm FinFET architected to meet the requirements of emerging mobile, technology nodes. Approximately 75% of the process steps Internet-of-Things (IoT), and RF applications. This platform are common with the 28nm platform enabling high yield achieves the power and performance efficiency of a 16/14nm capability. The gate-first High-K Metal Gate (HKMG) FinFET technology in a cost effective, planar device integration is used to ensure a low cost process flow [3]. A architecture that can be implemented with ~30% fewer typical cross-section of nFET and pFET devices is shown in masks. Performance comes from a second generation FDSOI Fig.1. All active devices are built on SOI whereas passive transistor, which produces nFET (pFET) drive currents of devices and select active devices, such as LDMOS, are 910μA/μm (856μA/μm) at 0.8V and 100nA/μm Ioff. For conventionally formed in the bulk substrate (Fig.2). In ultra-low power applications, it offers low-voltage operation addition to the introduction of FDSOI substrates, new process down to 0.4V Vmin for 8T logic libraries, as well as 0.62V and modules are introduced to support back-bias capability, 0.52V V min for high-density and high-current bitcells, ultra-passive device fabrication, enhanced device performance and low leakage devices approaching 1pA/µm Ioff, and body-technology scale factor (Fig.3). The introduction of a SiGe biasing to actively trade-off power and performance. channel for pFET devices by the condensation technique [4] Superior RF/Analog characteristics to FinFET are achieved and SOI thickness <7nm enable high DC drive currents. A including high f T /f MAX of 375GHz/290GHz and post STI hybrid etch process is used to form back gate 260GHz/250GHz for nFET and pFET, respectively. The contacts and enable the implementation of devices and taphigh f MAX extends the capabilities to 5G and millimeter wave cells in the bulk substrate (Fig.4). Dual in-situ doped epi (>24GHz) RF applications. processes (Si:P and SiGe:B) are formed in combination with a low-k spacer to ensure highly doped source/drain regions I. INTRODUCTION while maintaining low gate-to-drain capacitance (critical for Rising manufacturing costs and emerging applications RF applications). Technology CPP is scaled without adding requiring unparalleled energy efficiency are driving the need extra masking steps relative to the 28nm Front-End-of-Line. for new semiconductor device solutions. For the first time, Dual patterning techniques are used to scale M1/M2 pitch, an increase in the cost per die is observed with the leading to a logic/SRAM die scaling of 0.72x/0.83x relative to introduction of 16/14nm FinFET technologies due to the 28nm Poly/SiON technology node. increased process complexity and mask count. Cost sensitive B. Device Performance IoT and mobile applications are driving new requirements such as increased integration, advanced power management, Device construction utilizes either flip well (SLVT/LV...

The influence of a substrate voltage on the dc characteristics of an AlGaN/GaN high electron mobility transistor ͑HEMT͒ on silicon ͑111͒ substrate is profited to investigate traps that are located between the substrate and the two-dimensional electron gas channel. The transient of the drain current after applying a negative substrate voltage is evaluated in the temperature range from 30 to 100°C. With this method, known as backgating current deep level transient spectroscopy, majority carrier traps with activation energy of 200 meV as well as minority carrier traps at 370 meV are identified. The experiments are performed on completed HEMTs, allowing the investigation of the influence of device fabrication technology.Sapphire and SiC are commonly used as substrate materials for GaN based electronic and optoelectronic devices. Recently Si has been found as a useful alternative because of its low cost and good thermal conductivity. AlGaN/GaN/Si high electron mobility transistors ͑HEMT͒ with unity current gain frequencies comparable to those known for devices using sapphire or SiC substrates have been reported. 1 In contrast to sapphire the electrical conductivity of the Si substrate allows the application of a voltage at the backside of the devices through a substrate contact. This provides the control of backgating to study the physical properties of the device and of the material ͑defect states, trapping effects͒. The backgating effect is well known from GaAs based metalsemiconductor field effect transistors ͑MESFET͒ and HEMTs. 2 The junction between substrate and buffer creates a depletion layer that controls the transistor channel in the form of a gate from the backside. This effect can be used to control the drain current by a substrate voltage. The backgating effect is also one origin of the very high optoelectronic responsivity of MESFETs and HEMTs. 3 For HEMTs the backgating depletion region and therefore the influence of the substrate voltage is limited to the region below the twodimensional electron gas ͑2DEG͒. Therefore, all related effects have their origin in the bulk without contribution of surface effects. Uren et al. 4 have profited from the influence of a backgating voltage on the pinch-off voltage of an AlGaN/GaN HEMT on a conducting SiC substrate to investigate the electrically active centers in the GaN buffer. They have shown that the backgating depletion layer of the AlGaN/GaN HEMTs extends from the 2DEG into the buffer and is not located between substrate and buffer. Therefore, the observed effects do not originate from traps in the lower, more defective part of the buffer, but they are due to traps near the heterointerface. In this work we use backgating current deep level transient spectroscopy ͑DLTS͒ 5 to investigate the activation energy of traps in the buffer of an AlGaN/GaN HEMT on a Si substrate. Figure 1 shows the schematic band diagram of the substrate biased device.The device was fabricated using an AlGaN/GaN heterostructure grown by metalorganic vapor phase epitaxy on a 2 in. ͑111͒-o...

AlGaN/GaN HEMTs on silicon substrates have been fabricated and their static and small-signal RF characteristics investigated. The AlGaN/GaN material structures were grown on (111) p-Si by LP-MOVPE. Devices exhibit a saturation current of 0.91 A/mm, a good pinchoff and a peak extrinsic transconductance of 122 mS/mm. A unity current gain frequency of 12.5 GHz and max =0.83wereobtained.Thehighestsaturationcurrentreported so far, static output characteristics of up to 20 V and breakdown voltage at pinchoff higher than 40 V demonstrate that the devices are capable of handling 16 W/mm static heat dissipation.

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Conductivity and Hall effect measurements were performed before and after Si 3 N 4 passivation of intentionally undoped and doped AlGaN/GaN heterostructures on Si and SiC substrates. An increase of the sheet carrier density ͑up to ϳ30%͒ and a slight decrease of the electron mobility ͑less than 10%͒ are found in all samples after passivation. The passivation induced sheet carrier density is 1.5-2ϫ10 12 cm Ϫ2 in undoped samples and only 0.7ϫ10 12 cm Ϫ2 in 5-10ϫ10 18 cm Ϫ3 doped samples. The decrease of the electron mobility after passivation is slightly lower in highly doped samples. The channel conductivity in both types of unpassivated samples on Si and SiC substrates increases with an increase in doping density. After passivation, a well-resolved increase of channel conductivity is observed in the undoped or lightly doped samples and nearly the same channel conductivity results in the highly doped samples.