Abstract-This paper shows experimentally that standard wireless networks which measure received signal strength (RSS) can be used to reliably detect human breathing and estimate the breathing rate, an application we call "BreathTaking". We show that although an individual link cannot reliably detect breathing, the collective spectral content of a network of devices reliably indicates the presence and rate of breathing. We present a maximum likelihood estimator (MLE) of breathing rate, amplitude, and phase, which uses the RSS data from many links simultaneously. We show experimental results which demonstrate that reliable detection and frequency estimation is possible with 30 seconds of data, within 0.3 breaths per minute (bpm) RMS error. Use of directional antennas is shown to improve robustness to motion near the network.
The PA6T-1682M SoC targets applications including compute servers, networking, imaging and storage applications [1]. It integrates two 2GHz Power TM architecture cores, a shared 2MB L2, a coherent crossbar interconnect, two 1066MHz DDR2 64b memory channels, a configurable I/O subsystem able to support two 10Gb and four 1Gb Ethernet MAC, eight PCI Express links of configurable width with an aggregate bandwidth of 6GB/s, and hardware acceleration for cryptography, XOR and network functionalities. The functional block diagram is shown in Fig. 5.5.1. The chip die size is 115mm 2 , implemented in a 65nm triple-V t , dual-oxide 8M CMOS process.The maximum thermal design power is 25W. To achieve this efficiency, the cores have power-saving modes in addition to various active modes, as shown in Fig. 5.5.2. Each core has an independent supply (V DDcpu ), which can be shut down when there is no active workload. This arrangement also enables each core to operate with its own minimum required V DD under the presence of inter-core process and temperature variation. The SRAM arrays have their own V DD supply. The writability of the SRAM cell would otherwise be the limiting factor for the minimum core V DD . The memory and I/O subsystem has its own V DD , which is lower than the technology maximum for additional power savings.Low-voltage operation exacerbates the impact of PVT variations, so the design flow is enhanced to deal with such variations. Monte Carlo simulations are used to characterize critical circuit elements to optimize device sizing. Post processing of the static timing results compensates for the impact of statistical variations on the margin. Low-V t cell swapping into critical paths shapes timing histograms and improves speed yield. In this scheme, noncritical devices with a safe design margin are swapped with a longer channel version to reduce leakage power. Longer channel devices are chosen instead of high V t transistors because of their better voltage scalability and better trade-off of performance versus standby current.Clock gating is extensively used (23,000 instances) as an intrinsic way to implement logic functions and to save power. In-house tools gather flip-flop toggling statistics at the RTL stage of the design and provide early feedback on the effectiveness of clock gating in each functional unit. As the design progresses towards the physical implementation stage, power is re-estimated with actual parasitic extraction using commercial tools. Good correlation was found between the in-house RTL-level tool and the transistor-level simulation accounting for parasitics, as shown in Fig. 5.5.3.Two PLLs provide the variable frequencies for the core and fixed frequencies for the I/O and memory subsystem [2]. Debugging functions such as stretch/squeeze/stop of clocks are built into the balanced H-tree clock distribution. The changing core V DD poses challenges for the clocking scheme. The coherent crossbar and functional units it connects to, such as the L2, are clocked at half the core frequency. Due to ...
This article evaluates the accuracy with which the performance of a multiuser multiantenna system can be predicted with and without considering cochannel interference and noise (Gaussian, α‐stable, and Cauchy) using a site‐specific three‐dimensional (3D) ray tracing algorithm as well as with statistical models with Gaussian and Nakagami‐m channel models in small to medium sized aircraft. These models expand on previous statistical channel models such as the hyper‐Rayleigh model by including the simultaneous effects of cochannel and adjacent channel interference, antenna matching, efficiency, directivity and polarization as well as (for the 3D model) site‐specific multipath effects. Measurements and comparisons are made in a metallic‐bodied Beech Baron BE 58P and a composite structure Rockwell T‐39 Sabreliner. It was found that the 3D ray tracing model provides a mean capacity within 1% of those measured in the two aircraft in the presence of interference and noise. This was closely followed by the Nakagami‐m distribution (m = 1.4), which was within 1–3% of measured capacity in the presence of interference and within 6% for a combination of interference and noise and the Gaussian model which was within 6% of measured capacity in the presence of interference and within 11% for a combination of interference and noise. The Cauchy noise degraded the capacity more than the other types of noise in the aircraft, providing a lower bound for capacity in an aircraft system. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:1137–1144, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25939
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