SUMMARYThe paper presents an algorithmic approach to a low-sensitivity design strategy for analog filter pairs based on a gyrator-capacitor prototype circuit. The general structure of the prototype circuit is proposed. It assumed that the generic structure of the prototype circuit can evolve, with the use of additional gyrators, into a circuit with increased redundancy. It is shown that symbolic analysis of the prototype circuit, used to formulate a set of nonlinear algebraic equations, is necessary to achieve a sufficiently high algorithm operation speed. To find a solution to this specific system of nonlinear algebraic equations, different numerical methods are compared. The modified Hooke and Jeeves algorithm is found to be the most effective. The elaborated algorithms and programs are illustrated with the seventh-order filter pair example. The obtained filter is better than the filter obtained using LC ladder structures with respect to chip area and power consumption, and these improvements are obtained without loss of sensitivity properties.

The paper illustrates a practical example of technology migration applied to the colour space converter realized in CMOS technology. The element has analogue excitation and response signals expressed in current mode. Such converter may be incorporated into an integrated vision sensor for preconditioning acquired image data. The idea of a computer software tool supporting the automated migration and design reuse is presented as the major contribution. The mentioned tools implement the Hooke-Jeeves direct search method for performing the multivariable optimization. Our purpose is to ensure transferring the circuit between usable fabrication technologies and preserving its functional properties. The colour space converter is treated as the case study for performance evaluation of the proposed tool in cooperation with HSPICE simulation software. The original CMOS technology files for Taiwan semiconductor (TSMC) plant were utilized for the research. The automated design migration from 180 nm into 90 nm resulted with obtaining compact IC layout characterized by a smaller area and lower power consumption. The paper is concluded with a brief summary that proves the usability of the proposed tool in designing CMOS cells dedicated for low power image processing.

SUMMARYThis paper presents an approach to a low-sensitivity design strategy for switched-current (SI) filter pairs based on a gyrator-capacitor prototype circuit. On the basis of a prototype filter, an SI counterpart circuit is obtained. Tools for SI filter design automation have been developed, which make a hardware description language -analog-mixed signal synthesization for the chosen kind of circuit. The obtained SI filter is better than the filter obtained using LC ladder structures with respect to very-large-scale integration complementary metal-oxide-semiconductor chip area and power consumption.

The paper presents the idea of software suite integrating the tools supporting the analog filter design. It uses the prototype circuits that are composed of gyrators and capacitors. The essential, behavioral parameters are characterised for the filtering structures. The basic assumptions formulated before the implementation are also mentioned. The structure of the software suite is discussed, its functional properties and the implementation issues are mentioned. The resulting software brings the automation of designing SISO filters as well as the filter pairs. In the proposed solution the VHDL-AMS language is assumed as the formal method of hardware description.

No abstract