We report the use of nickel-platinum silicide (NiPtSi) as a source/drain (S/D) material for strain engineering in P-MOSFETs to improve drive current performance. The material and electrical characteristics of NiPtSi with various Pt concentrations was investigated and compared with those of NiSi. Ni 0.95 Pt 0.05 Si was selected for device integration. A 0.18 µm gate length P-MOSFET achieved a 22% gain in I Dsat when Ni 0.95 Pt 0.05 Si S/D is employed instead of NiSi S/D. The enhancement is attributed to strain modification effects related to the nickel-platinum silicidation process.

Conduction behaviour of n-MOSFET capacitors with an oxide thickness (T ox ) of 18.5 Å was investigated before and after constant current stress. It was found that stress-induced leakage current (SILC) strongly depends on the low sense voltages. Conduction mechanism of the low voltage SILC (LV-SILC) was analysed systematically, based on the assumption that the LV-SILC is due to interface trap-assisted tunnelling (ITAT) process. Using the LV-SILC as a probe, the generation of interface defects was probed by the LV-SILC. Interface defects in both anode and cathode are involved in the ITAT process, but the former dominates the oxide reliability. Based on the results of interface defect generation sensed by the LV-SILC, a new method to project lifetime (T BD ) or monitor the oxide reliability was set up.

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A comparative experimental study of series resistance and hole mobility of pMOSFETs with silicon germanium (SiGe) junctions under various silicide techniques is carried out. It is found that using an additional germanium pre-amorphous implant process in the nickel silicide (NiSi) techniques does not affect the hole mobility. However, it increases the source/drain series resistance. On the other hand, an additional silicon capping layer process in the NiSi techniques not only improves the hole mobility, but also reduces the series resistance dramatically. Various MOSFET characterizations from the silicide techniques are mainly due to the differences in the NiSi/SiGe interface structures in those devices.