By employing a new InP surface preparation procedure based upon KOH/methanol, the interface state density of plasma-enhanced chemically vapor deposited Si0 2 /lnP structures has been significantly reduced. Capacitance-voltage characteristics of these structures exhibit unusual nonequilibrium behavior which appears to be assoicated with the formation of a p-type inversion layer and with the presence of interface traps with very slow response times. This surface preparation procedure yields an InP native oxide which has no detectable In 2 0) and is contaminated with K.

Focused ion beams from Au–Si, Au–Be, and B–Pt liquid–metal–alloy ion sources have been used to implant GaAs and Si. An Al stopping layer on the wafers was used to trap the Au and Pt ions. Hall mobilities consistent with those in bulk materials have been obtained for B-doped Si and Be-doped GaAs. In addition, a 2000-Å-diam Au–Si focused ion beam was used to implant the doped regions of GaAs metal-semiconductor gate field-effect transistors. The 140-keV Si++ beam component was deflected under computer control to implant 8×50 μm active channel regions and 16×50 μm contact regions. The devices were metalized using conventional lithography. DC electrical characteristics of the 1.5-μm-gate-length devices are comparable to those of conventionally processed devices of identical geometry.

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