The current-time characteristics of a polysilicon-polysilicon oxide-polysilicon structure were determined as a function of several MOS IC process parameters. We found a strong dependence of the current with the polysilicon oxidation temperature (900~176 in the case of an oxygen ambient. The data were empirically analyzed by an equation of the form J = At -n where "A" and "n" are constants; the current and "n" factor dependencies with measurement temperature (23~176 and MOS bias (reference) electric field (1-3 X 106 V/cm) will be discussed. Interpretation of the data within the framework of surface asperities at the polysilicon-polysilicon oxide interface and a FowlerNordheim injection model will be discussed.

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1 ABSTRACT An e l e c t r i c a l l y a l t e r a b l e , f l o a t i n g g a t e , n o n -v o l a t i l e memory t r a n s i s t o r has been developed, having a c e l l a r e a o f u n d e r 50011*, and using an advanced n-channel, p o l y s i l i c o n g a t e p r o c e s s . Cell programming occurs via hot-electron inject i o n , e x h i b i t i n g t h r e e d i s t i n c t o p e r a t i n g r egimes. Erase, on the other hand i s based on f i e l d e m i s s i o n f r o m f l o a t i n g g a t e t o c o n t r o l gate.The magnitude o f e l e c t r i c a l e r a s e i s determined by applied bias, device parameters a n d p r o c e s s i n g h i s t o r y , p a r t i c u l a r l y t h e i n t e rlevel oxidation temperature. Analysis of experimental data shows t h a t e l e c t r i c a l e r a s e does change programming c h a r a c t e r i s t i c s s i g n i f i c a n t l y , and must be accounted f o r i n c i r c u i t d e s i g n . Memory retention, determined by thermal s t r e s s , i s c o m p a r a b l e t o c o m m e r c i a l l y a v a i l a b l e EPROMs. The memory c e l l e x h i b i t s b e t t e r t h a n 1000 cycle wri te/erase capabi 1 i ty, w i t h degradat i o n i n i n t e r l e v e l c o n d u c t i o n b e i n g t h e p r i n c i p l e f a c t o r l i m i t i n g endurance. Read d i s t u r b i s n o t a problem a t 5V o p e r a t i o n , b u t c o u l d become so a t h i g h e r o p e r a t i n g v o l t a g e s . INTRODUCTION O f the two classes of non-volatile semiconductor memories (NVSM) which have evolved, duald i e l e c t r i c and f l o a t i n g g a t e , t h e f l o a t i n g g a t e c o n f i g u r a t i o n has been 1 i m i t e d p r i m a r i l y t o UV e r a s e o p e r a t i o n . D e s p i t e t h i s l i m i t a t i o n , t h e a t t r a c t i v e f e a t u r e s o f t h e f l o a t i n g g a t e s t r u cture, which include excellent memory r e t e n t i o n , h i g h s p e e d c a p a b i l i t y a n d r e l a t i v e l y s i m p l e nchannel MOS compatible processing, have encouraged continued effort towards development of a f u l l y e l e c t r i c a l p a r t ( 1 -4 ) . Future requirements o f v e r y l a r g e s c a l e , high speed non-volatile memories place additional demands on c e l l s i z e and speed c a p a b i l i t y . I n o r d e r t o meet those goals, the approach taken i n t h i s E l e c t r i c a l l y A1 terable Read-only Memory (EAROM) e f f o r t i s t o t a k e a d v a n t a g e o f t h e anomal o u s l y h i g h c o n d u c t i o n p r o p e r t i e s o f i n t e r l e v e l Si0 thermally grown on polysilicon to provide e l e g t r i c a l e r a s e . T h i s i s merged w i t h t h e a l r e a d y we1 1 c h a r a c t e r i z e d p r o g r a m i n g c a p a b i l i t y and s m a l l c e l l s i z e o f t h e UV erasable n-channel EPROM ( 5 ) . presents experimental results and a n a l y s i s o f i t s This paper discribes the EAROM s t r u c t u r e , programming and erase characteristics, and addresses q u e s t i o n s r e l a t i n g t o e n...

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