This paper introduces a novel aRRroach for mauuing netn'mes to layout elements without using -layout-versus-;chimatic tools.Using this technique, a program has been developed that analyzes layouts, computes an observability degree for electron or laser beam testing, detects unobservable nets, and automatically selects probing points for chip-internal measurement. Shortened execution times and applicability to incomplete layout data are the main advantages over layoutversus-schematic based techniques. 17.3.1 IEEE 1992 CUSTOM INTEGRATED CIRCUITS CONFERENCE0-7803-0246-XI92 $3.00 0 1992 IEEE

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The comparison of measured versus expected signals is the basic operation of any test process. It becomes a critical task especially when rather noisy contactless measurement techniques are employed for prototype debug and quality assurance purposes. The presentation describes ways to get most reasonable pass/fail decisions in the case of uncertainties.