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This paper introduces a novel aRRroach for mauuing netn'mes to layout elements without using -layout-versus-;chimatic tools.Using this technique, a program has been developed that analyzes layouts, computes an observability degree for electron or laser beam testing, detects unobservable nets, and automatically selects probing points for chip-internal measurement. Shortened execution times and applicability to incomplete layout data are the main advantages over layoutversus-schematic based techniques. 17.3.1 IEEE 1992 CUSTOM INTEGRATED CIRCUITS CONFERENCE0-7803-0246-XI92 $3.00 0 1992 IEEE

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A novel environment for test program development will be introduced that supports automatic specification-driven and computer-assisted test parameter acquisition, automatic test program generation and automatic documentation generation. Test parameter and test pattern acquisition, main portion of test program generation and documentation generation have been designed to be tester-independent by means of automatic technology file access and simulation-to-test signal conversion. A built-in rule checker guarantees for test parameter consistency and completeness. Runtimeoptimization of test programs, and test document generation can be done upon user request.