This paper presents the design and simulation results of a switched-current (SI) MASH 2-2-2 Sigma-Delta Modulator (Σ∆M). The modulator makes use of a low-distortion swing suppression topology which is highly suitable for wideband and high-order modulators. Simulation results reveal that peak signal to noise plus distortion ratio (SNDR) is 83.5 dB at 5 MHz sampling rate with 10 kHz bandwidth. The modulator was designed in a 0.6 µm CMOS technology and the power dissipation is about 45 mW.

This paper presents the design and simulation results of a switched-current (SI) 2-2 MASH Sigma-Delta Modulator (Σ∆M). The modulator is composed by a low-distortion swing suppression topology which is highly suitable for wideband applications. It was realized using fully-differential circuitry with common-mode feedback. The circuit performs 14-bit dynamic range (DR) up to 5 MHz clock frequency and 20 kHz bandwidth. The modulator was designed in 0.6 µm CMOS technology and was sent to the foundry to prototype.