Light detection and ranging (LiDAR) systems based on silicon single-photon avalanche diodes (SPAD) offer several advantages, like the fabrication of system-on-chips with a co-integrated detector and dedicated electronics, as well as low cost and high durability due to well-established CMOS technology. On the other hand, silicon-based detectors suffer from high background light in outdoor applications, like advanced driver assistance systems or autonomous driving, due to the limited wavelength range in the infrared spectrum. In this paper we present a novel method based on the adaptive adjustment of photon coincidence detection to suppress the background light and simultaneously improve the dynamic range. A major disadvantage of fixed parameter coincidence detection is the increased dynamic range of the resulting event rate, allowing good measurement performance only at a specific target reflectance. To overcome this limitation we have implemented adaptive photon coincidence detection. In this technique the parameters of the photon coincidence detection are adjusted to the actual measured background light intensity, giving a reduction of the event rate dynamic range and allowing the perception of high dynamic scenes. We present a 192 × 2 pixel CMOS SPAD-based LiDAR sensor utilizing this technique and accompanying outdoor measurements showing the capability of it. In this sensor adaptive photon coincidence detection improves the dynamic range of the measureable target reflectance by over 40 dB.

The analog performance, e.g. intrinsic gain and bandwidth, of SOI (Silicon-on-Insulator) MOSFETs is strongly affected by increasing operating temperature. Increased leakage currents and decreased device performance significantly reduce the high temperature capability of analog circuits at high temperatures. In this paper, we demonstrate that the reverse body biasing (RBB) approach improves the transistor's analog performance up to 400°C. With RBB, operation in the lower moderate inversion region of the SOI transistor is feasible at increased temperatures. The method also allows beneficial FD (fully depleted) device characteristics in a 1.0 µm PD (partially depleted) SOI CMOS process. NHGATE and PHGATE devices with an H-shaped gate have been investigated. Results report an improvement of the gm/Id factor and the intrinsic gain Ai in the moderate inversion region by applying RBB. In addition, essential analog building blocks, e.g. current mirrors, an analog switch and a two-stage operational amplifier have been investigated. It is shown that the high temperature operation of these circuits is significantly enhanced when RBB is applied

In this paper, we present a capacitive, MEMS-based accelerometer comprising an ultra-low noise CMOS integrated readout-IC and a high-precision bulk micro machined sensing element. The resulting accelerometer reaches an acceleration equivalent noise of only 200 ng/√Hz, which makes it suitable for seismic measurement that require noise levels significantly below 1 µg/√Hz. Additionally, a high bandwidth of more than 5 kHz was achieved, which also makes the presented sensor system applicable for high-frequency measurements, e.g. in predictive maintenance applications for rotating machinery. The design of the sensing element and readout IC is presented in detail and measurement results are shown which demonstrate the performance of the sensor system.

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Abstract. In this paper we present a readout circuit for capacitive micro-electro-mechanical system (MEMS) sensors such as accelerometers, gyroscopes or pressure sensors. A flexible interface allows connection of a wide range of types of sensing elements. The ASIC (application-specific integrated circuit) was designed with a focus on ultra-low noise operation and high analog measurement performance. Theoretical considerations on system noise are presented which lead to design requirements affecting the reachable overall measurement performance. Special emphasis is put on the design of the fully differential operational amplifiers, as these have the dominant influence on the achievable overall performance. The measured input referred noise is below 50 zF/ √Hz within a bandwidth of 10 Hz to 10 kHz. Four adjustable gain settings allow the adaption to measurement ranges from ±750 fF to ±3 pF. This ensures compatibility with a wide range of sensor applications. The full input signal bandwidth ranges from 0 Hz to more than 50 kHz. A high-precision accelerometer system was built from the described ASIC and a high-sensitivity, low-noise sensor MEMS. The design of the MEMS is outlined and the overall system performance, which yields a combined noise floor of 200 ng/ √ Hz, is demonstrated. Finally, we show an application using the ASIC together with a CMOS integrated capacitive pressure sensor, which yields a measurement signal-to-noise ratio (SNR) of more than 100 dB.