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he has taught primarily solid state courses since 1989, winning two teaching awards. From 1985-9 he was Member of Technical Staff at Bellcore, after obtaining his Ph.D. from the Univ. of Illinois at Urbana-Champaign. He has 120 research publications in compound semiconductor materials and devices, and mentored 17 graduate students.

RC and single-inverter-based rail clamps are widely used in semiconductor products for electrostatic discharge (ESD) protection. We propose a technology-node-independent design methodology for these rail clamp circuits that takes process, voltage, and temperature variations into consideration. The methodology can be used as a cookbook by the designer or be used to automate the entire design process. Tradeoffs between various design metrics such as ESD performance (Human Body Model), leakage, and area are considered. Simplified circuit models for the rail clamp are presented to gain insights into its working and to size the circuit components. A rail clamp for core power domain is designed using the proposed approach in 40nm low-power process and performance results of the design are also presented. The effectiveness of the design methodology is proven in three different technology nodes by comparing the obtained design with the best design from among 250,000 designs obtained by randomly sampling from the design space. ACM Reference Format:Ramachandran Venkatasubramanian, Robert Elio, and Sule Ozev. 2016. Process independent design methodology for the active RC and single-inverter-based rail clamp.