Abstract. Power analysis attack is one of the most important and effective side channel attack methods, that has been attempted against implementations of cryptographic algorithms. In this paper, we investigate the vulnerability of SIMON [5] and LED [16] lightweight block ciphers against Differential Power Analysis (DPA) attack. Firstly, we describe the power model used to mount the attack on Field Programmable Gate Array (FPGA) implementation of SIMON and LED block ciphers. Then, we proceed to experimentally verified DPA attack, which is the first successful DPA attack on the algorithms. Our attack retrieves complete 64-bit key of SIMON32/64 and LED-64 with a complexity of 176 and 218 hypotheses respectively. Finally, we present our analysis on other versions of SIMON and LED. Our DPA results exhibits the weakness of algorithms, which emphasize the need for secure implementation of SIMON and LED.

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As Internet of Things (IoT) evolves very rapidly, security components (cryptographic algorithm, protocol) of embedded devices need to be secure against software and physical attacks. However, the performance factors namely speed, area, and power play a major role in selection of security components for a resource constrained embedded devices. Subsequently, cryptographers are more attentive on designing lightweight ciphers to protect the information in such devices. PRINCE [3] and RECTANGLE [18] lightweight block ciphers are proposed using new design strategies for efficiency and security. In this paper we analyse the security of PRINCE and RECTANGLE against a type of side-channel attack called Correlation Power Analysis (CPA) attack. Our attack reduces key search space from 2 128 to 33008 for PRINCE and 2 80 to 288 for RECTANGLE.

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In this paper, residue number system (RNS) based logic is proposed as a protection against power side-channel attacks. Every input to RNS logic is encrypted as a share of the original input in the residue domain through modulus values. Most existing countermeasures enhance side-channel privacy by making the power trace statistically indistinguishable. The proposed RNS logic provides cryptographic privacy that also offers side-channel resistance. It also offers side-channel privacy by mapping different input bit values into similar bit encodings for the shares. This property is also captured as a symmetry measure in the paper. This side-channel resistance of the RNS secure logic is evaluated analytically and empirically. An analytical metric is developed to capture the conditional probability of the input bit state given the residue state visible to the adversary, but derived from hidden cryptographic secrets. The transition probability, normalized variance, and Kullback–Leibler (KL) divergence serve as side-channel metrics. The results show that our RNS secure logic provides better resistance against high-order side-channel attacks both in terms of power distribution uniformity and success rates of machine learning (ML)-based power side-channel attacks. We performed SPICE simulations on Montgomery modular multiplication and Arithmetic-style modular multiplication using the FreePDK 45 nm Technology library. The simulation results show that the side-channel security metrics using KL divergence are 0.0204 for Montgomery and 0.0020 for the Arithmetic-style implementation. This means that Arithmetic-style implementation has better side-channel resistance than the Montgomery implementation. In addition, we evaluated the security of the AES encryption with RNS secure logic on a Spartan-6 FPGA Board. Experimental results show that the protected AES circuit offers 79% higher resistance compared to the unprotected AES circuit.