A lateral gate-controlled double dot structure in Si has been fabricated for studying coupled two qubits. Nonequilibrium single-electron tunneling measurements at 1.4K show that the second Coulomb peak, associated with a two-electron occupation, splits into two side peaks, and that their separation displays a strong magnetic-field dependence for various interdot coupling constants. Moreover, for some fixed magnetic fields, the separation of the side peaks decays exponentially as a function of the interdot coupling. We attribute this behavior to electron spin exchange and spin swapping between singlet and triplet states in the coupled double dot in the presence of a magnetic field.
Articles you may be interested inSingle-electron transistors based on self-assembled silicon-on-insulator quantum dots Appl. Phys. Lett. 96, 142108 (2010); 10.1063/1.3383235 Isolated double quantum dot capacitively coupled to a single quantum dot single-electron transistor in silicon A dual-gate-controlled single-electron transistor with coupled dot geometry has been fabricated on a silicon-on-insulator structure. Coupled dots are defined by tunable gates which are designed to separately control the tunneling potential barriers to compensate for disorder due to size fluctuation in quantum dots. The Coulomb-blockade phenomena observed in linear and nonlinear transport regimes were found to be enhanced by the multidot coupling. The Coulomb staircase ͑nonlinear effect͒ appears more clearly with the increasing number of coupled dots, indicating definite suppression of the inevitable cotunneling process. In the linear regime, the frequency of Coulomb oscillation was able to be tuned by changing the interdot coupling strength. These results indicate that enhancement of the Coulomb blockade and tunability can be achieved through replacing the traditional single dot by gate-controlled multidots in future single-electron devices.
A new device structure for a single-electron-tunnelling transistor with a dual-gate geometry has been fabricated based on the silicon-on-insulator structure prepared by SIMOX wafers. The split gate of the transistor is the lower-level gate and located ∼20 nm above the inversion layer 2DEG active channel, which yields strong carrier confinement with a fully controllable tunnelling potential barrier. The transistor operates at low temperatures and exhibits single-electron tunnelling behaviour through a nano-size quantum dot. The Coulomb blockade oscillation is demonstrated at 15 mK and its periodicity is 16.4 mV in the upper gate voltage. For the nonlinear transport regime, Coulomb staircases are clearly observed up to four current steps in the range of 100 mV drain-source bias. The I -V characteristics near zero bias display a typical Coulomb gap due to the one-electron charging effect. From the width of the blockade regime the dot capacitance is estimated to be ∼13 aF.
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