Ru-Ta alloy was investigated as the diffusion barrier layer in Cu dual damascene interconnects, and Cu filling property and reliability performances with RuTa/RuTa(N) stacked barrier structure were mainly evaluated. RuTa strongly orientated to Ru(002) and the lattice misfit between Ru(002) and Cu(111) was lower than that between Ta(110) and Cu(111). The wettability of Cu seed on RuTa was much better than that on Ta. The barrier property against Cu diffusion of RuTa/RuTa(N) stacked barrier structure kept the equivalent barrier property of conventional Ta/TaN one. Filling property of Cu electroplating was improved by using Ru-Ta alloy barrier, and trenches of 45 nm in width could be filled successfully due to the suppression of the agglomeration of Cu seed on the sidewall of trench. Via resistance with RuTa/RuTa(N) barrier was much lower than that with Ta/TaN one due to its low resistivity. The estimated life time of via electromigration with RuTa/RuTa(N) barrier was longer than that with Ta/TaN one because of the good wettability and filling property inside via. Consequently, Cu filling property and reliability performance can be improved with RuTa/RuTa(N) stacked barrier structure in Cu interconnects. Copper (Cu) interconnects have been applied to ultra large scale integrated circuits (ULSIs) to reduce the resistance of wiring and resistive-capacitive (RC) delay since the introduction of 130 nm complementary metal oxide semiconductors (CMOSs). As the feature size of trench and via continues to shrink, filling the gaps with Cu electroplating becomes more difficult. For perfectly gap filling, the opening of trench and via after the deposition of barrier and Cu seed have to be kept enough by thinning barrier and/or Cu seed. However, thinning Cu seed leads to Cu being agglomerated on the sidewall of both trench and via where Cu seed is too thin due to its poor coverage, resulting in the formation of voids inside trench and via. Therefore, one challenging issue for Cu interconnects is to fill trench and via completely without the agglomeration of Cu seed on the diffusion barrier layer.New barrier metals that have better wettability with Cu than conventional Tantalum (Ta) have been studied to achieve continuous and smooth Cu film on them.1-26 Among them, Cobalt (Co) and Ruthenium (Ru) have been most frequently suggested for suppressing the agglomeration of Cu seed. Co is known to have the good film properties such as the low resistivity, the high melting point and the good adhesion with Cu. However, Co has the serious problems with chemical mechanical polishing (CMP) process and wet etching process. Co is corroded readily during CMP process and wet etching process, and the slits are occurred between Cu wiring and the interlayer dielectric. It results in the degradation of the device yield and reliability performance. As for Ru, the barrier property against Cu diffusion is not enough, and CMP process for Ru is a difficult technology and the scratch occurred during CMP process leads to the degradation of the device yie...

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Dual damascene Cu interconnects with Keff below 2.0 have been demonstrated for the first time. Air gaps between Cu lines were formed with a low K SiOC film in a carefully designed manner. CoWP cap layers were introduced to protect the Cu lines and to eliminate a dielectric liner layer. In addition, AGE (Air Gap Exclusion) was applied to solve crucial problems related to the air gaps. Keff of 1.9 was obtained at 65nm design rule, which surpassed by far ITRS target (2.5 2.8) for hp45. It was also confirmed that leakage current between lines was suppressed by the formation of the air gaps.

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A stacked image sensor with a 0.9 μm pixel size fabricated by using organic photoconductive film (OPF) was realized. It is the first trial to introduce an active material, that is, an organic semiconductor into the BEOL process. This pixel structure is fabricated by using a standard 45 nm BEOL process. However, after OPF deposition, it is essential to restrict the thermal budget and to avoid oxygen, moisture, and plasma irradiation. By controlling the above conditions, a demonstration of a stacked image sensor with OPF, which has high sensitivity, high saturation charge, and a wide incident light angle, was successfully performed.Introduction As the pixel size of image sensors shrinks, new technologies dependant on BEOL, such as lightpipes [1], the separation walls of on-chip color filters (OCFs) [2], and backside illumination (BSI) [3], have been widely developed and introduced into mass production recently. Pixel size has shrunk to nearly 1.0 μm.However, as silicon has a low absorption coefficient, the depth of photodiodes should be larger than 3 μm to ensure sensitivity regardless of pixel size, i.e., as pixel size becomes small, the aspect ratio of photodiode must be large. As a result, the leakage of light to the neighboring pixels in a photodiode increases. This leads to narrow incident light angles.To suppress the leakage of light and achieve wide incident light angles at a small pixel size, it is necessary to develop a stacked image sensor with another photoconductive film that works effectively even if it becomes thinner.Recently, organic semiconductors have been applied to photoelectric conversion devices, such as light emitting diodes, illumination, and solar cells [4, 5]. Some organic materials have a higher absorption coefficient than does silicon, as shown in Fig. 1. Therefore, in image sensors, the thickness of photoelectric conversion film (photodiode) can be decreased to under 0.5 μm by using organic materials, as shown in Fig. 2. This makes it possible to have both a high sensitivity and a wide incident light angle [6] at a pixel size under 1.0 μm.Because organic photoconductive film (OPF) is not so robust, there are some problems that must be overcome in order to introduce it into the BEOL process. It is necessary to restrict the thermal budget and to avoid oxygen, moisture, and plasma irradiation, which includes ultraviolet light.In addition to the above problems, in stacked image sensors, which are different from normal CMOS image sensors, the capacitance of lower pixel electrodes as well as plugs affects the electronic crosstalk of adjacent pixels, so that deciding both the pixel structure and the position of the lower pixel electrodes becomes important problem.In this work, to solve the above problems, we considered where the OPF, lower pixel electrodes, and global layer should be placed and proposed two structures: an "OPF over global layer" and an "OPF under global layer."Pixel Structure using OPF This stacked image sensor used 45 nm CMOS technologies on a 300 mm wafer. Three Cu fine laye...