A new method for creating instruction level energy models for pipelined processors is introduced. This method is based on measuring the instantaneous current drawn by the processor during the execution of the instructions. An appropriate instrumentation set up was established for this purpose. According to the proposed method the energy costs (base and inter-instruction costs) are modeled in relation to a reference instruction (e.g. NOP). These costs incorporate inter-cycle energy components, which cancel each other when they are summed to produce the energy consumption of a program resulting in estimates with high accuracy. This is confirmed by the results. Also the dependencies of the energy consumption on the instruction parameters (e.g. operands, addresses) are studied and modeled in an efficient way.

In this paper the measurements taken for the development of instruction-level energy models for microprocessors are presented and analyzed. An appropriate measuring environment and a suitable measuring methodology was developed for taking the necessary measurements. The energy of an instruction is defined as a sum of three components. The pure base energy cost, the inter-instruction cost and the effect of the energy sensitive factors (instruction parameters). These components are characterized for each instruction of the ARM7TDMI embedded processor and their values are analyzed. Using the resulted models estimates of the energy consumption of real software kernels with only up to 5% error was determined.

No abstract

No abstract

The resistive-capacitive behavior of long interconnects which are driven by CMOS gates is analyzed in this paper. The analysis is based on the n-model of an RC load and is developed for submicron devices. Accurate and analytical expressions for the output voltage waveform, the propagation delay and the short circuit power dissipation are derived by solving the system of differential equations which describe the behavior of the circuit. The effect of the coupling capacitance between input and output and that of short circuit current are also incorporated in the proposed model. The calculated propagation delay and short circuit power dissipation are in very good agreement with SPICE simulations.