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An add-on type real-time jitter tolerance enhancer (JTE) is presented in this paper. The proposed JTE can improve high-frequency jitter tolerance (JTOL) by using a real-time phase alignment scheme. A mathematical analysis for an advanced bit error rate (BER) prediction method is also introduced. The proposed circuit is applicable to various types of receivers, such as referenceless receivers, receivers with a reference clock source, and source-synchronous receivers. The referenceless receiver with the proposed JTE achieved an out-of-band JTOL of 0.71 UI pp at 100 MHz with <10 −12 BER. This is 196% higher than a conventional receiver without the JTE. The source-synchronous receiver with the proposed JTE achieved 0.92 UI pp at 300 MHz with <10 −12 BER. Total core areas of the receiver and JTE are 0.19 and 0.07 mm 2 in a 0.13-µm CMOS process, respectively. The power consumption of the receiver is 38 mW at 5.4 Gbit/s, and the JTE dissipates 22 mW.Index Terms-Bit error rate (BER), jitter tolerance (JTOL), real-time jitter tolerance enhancer (JTE), receiver (Rx).

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