We report a new InP/GaAsSb double heterojunction bipolar transistor (DHBT) emitter fin architecture with a record f MAX = 1.2 THz, a simultaneous f T = 475 GHz, and BV CEO = 5.4 V. The resulting BV CEO × f MAX = 6.48 THz-V is unparalleled in semiconductor technology. Devices were realized with a 20-nm-thick compositionally and impurity graded GaAsSb-base and a 125-nm InP collector. The performance arises because the process allows: 1) a tunable base-emitter access distance down to 10 nm; 2) the use of thicker base contact metals; and 3) the minimization of parasitic capacitances and resistances via precise lateral wet etching of the base-collector (B/C) mesa. Perhaps more significantly, InP/GaAsSb DHBTs with f MAX ≥ 1 THz are demonstrated with emitter lengths as long as 9.4 μm and areas as high as 1.645 μm 2 . Such an area is >6× larger than previously reported terahertz (THz) DHBTs, representing a breakthrough in THz transistor scalability. This attractive performance level is achieved with a very low dissipated power density which makes InP/GaAsSb DHBTs well-suited for high-efficiency millimeter-and submillimeter-wave applications. Furthermore, we provide the first large-signal characterization of a THz transistor with 94 GHz load-pull measurements showing a peak power-added-efficiency (PAE) of 32.5% (40% collector efficiency) and a maximum saturated power of 6.67 mW/μm 2 or 1.17 mW/μm of emitter length in a common-emitter configuration. Devices operate stably under large-signal conditions, with voltages nearly twice higher than those for peak small-signal performance.

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We report the 94 GHz large-signal load-pull performance of (0.3 × 9) μm 2 InP/Ga(In)AsSb double heterojunction bipolar transistors (DHBTs) in the common-emitter (CE) and common-base (CB) configurations. Both configurations were implemented side-by-side on either 20-nm-thick graded GaAsSbor GaInAsSb-base layers. A measured record saturated output power P OUT,SAT = 14.5 dBm with a corresponding power density 10.4 mW/μm 2 were achieved in the GaInAsSb-base CB configuration. The performance follows from i) the higher power gain in the CB topology and, ii) the superior BV CEO and BV CBO breakdown voltages obtained with the quaternary base which allow degradation-free operation at higher voltages. Load-pull contours show a combination of high output power and power gain in the proximity of 50 for a wide range of load impedances. In contrast, CB InP/GaAsSb DHBTs deliver P OUT,SAT = 10.6 dBm and 4.3 mW/μm 2 . For all devices considered here, CB operation improves transistor robustness against high-power device degradation. The present work provides the first report on the power performance of quaternary InP/GaInAsSb DHBTs in CE/CB topologies, with comparison to ternary InP/GaAsSb DHBTs.INDEX TERMS InP/Ga(In)AsSb, double heterojunction bipolar transistors (DHBTs), common-emitter (CE), common-base (CB), load-pull measurements, maximum output power, power gain, power density.This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.

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