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Objectives: Poor sleep quality is considered a global health problem. Considering that caffeine intake contributes to sleep disturbances, we evaluated the relationship between sleep quality and the consumption of caffeinated beverages in college students in Jeddah, Kingdom of Saudi Arabia. Methods: This was a cross-sectional study conducted with college students aged 18 to 25 years old from both governmental and private colleges in Jeddah, Saudi Arabia. Sleep quality, caffeine intake, and stress exposure were assessed using three validated electronic questionnaires. Results: A total of 476 college students completed the questionnaire. Sleep quality was found to be poor in 80.7% of students. The prevalence of caffeine intake was as follows: none = 8%, a tolerable amount = 40.5%, and excessive = 51.5%. Of the students who reported excessive caffeine intake, 83.3% had poor sleep quality. The relationship between excessive caffeine intake and poor sleep quality was significant (p = 0.003). Conclusions: The majority of students had poor sleep quality, and this was correlated with excessive caffeine intake. Our results highlight the importance of raising awareness among students about the factors that may affect sleep quality.

High performance thin film transistor (TFT) can be a great driving force for display, sensor/actuator, integrated electronics, and distributed computation for Internet of Everything applications. While semiconducting oxides like zinc oxide (ZnO) present promising opportunity in that regard, still wide area of improvement exists to increase the performance further. Here, we show a wavy channel (WC) architecture for ZnO integrated TFT which increases transistor width without chip area penalty, enabling high performance in material agnostic way. We further demonstrate digital logic NAND circuit using the WC architecture and compare it to the conventional planar architecture. The WC architecture circuits have shown 2× higher peak-to-peak output voltage for the same input voltage. They also have 3× lower high-to-low propagation delay times, respectively, when compared to the planar architecture. The performance enhancement is attributed to both extra device width and enhanced field effect mobility due to higher gate field electrostatics control.

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