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One effective way to reduce the power consumption of biomedical implantable devices is to employ different supply voltages for different parts of the system depending on the processing speed of each part. This, however, necessitates the use of voltage level converters. This paper presents a power-efficient voltage level-shifting architecture that is capable of converting low levels of input voltages (even subthreshold levels) to high levels of output voltages. In order to reduce the transition time of the output signal and consequently power consumption, the proposed circuit utilizes a diodeconnected transistor to reduce the swing of the critical node. Moreover, the pull-down network is also improved. Post-layout simulation results of the proposed structure in a 0.18-µm CMOS technology show that at the target design of input low supply voltage of 0.4 V and high supply voltage of 1.8 V, the level-shifter has a propagation delay of 31ns, a static power dissipation of 1.16nW, and a power dissipation of 0.68µW for a 1-MHz input signal.

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