This article presents a novel asymmetrical 21-level multilevel inverter topology for solar PV application. The proposed topology achieves 21-level output voltage without H-bridge using asymmetric DC sources. This reduces the devices, cost and size. The PV standalone system needs a constant DC voltage magnitude from the solar panels, maximum power point tracking (MPPT) technique used for getting a stable output by using perturb and observe (P&O) algorithm. The PV voltage is boosted over the DC link voltage using a three-level DC-DC boost converter interfaced in between the solar panels and the inverter. The inverter is tested experimentally with various combinational loads and under dynamic load variations with sudden load disturbances. Total standing voltage with a cost function for the proposed MLI is calculated and compared with multiple topologies published recently and found to be cost-effective. A detailed comparison is made in terms of switches count, and sources count, gate driver boards, the number of diodes and capacitor count and component count level factor with the same and other levels of multilevel inverter and found to be the proposed topology is helpful in terms of its less TSV value, devices count, efficient and costeffective. In both simulation and experimental results, total harmonic distortion (THD) is observed to be the same and is lower than 5% which is under IEEE standards. A hardware prototype is implemented in the laboratory and verified experimentally under dynamic load variations, whereas the simulations are done in MATLAB/Simulink. INDEX TERMS Multilevel inverter, photovoltaic (PV) system, maximum power point tracking (MPPT), cost function (CF), TSV calculation, total harmonic distortion (THD).

Power converter plays a significant role in Proton Exchange Membrane Fuel Cell (PEMFC) energy generation systems, which is an alternative of distributed energy generation systems. So there creates a demand for high-quality power conditioning used in PEMFC systems. This paper proposes a converter topology as a power interface and also introduced a multilevel inverter topology for various levels of operation. The converter steps up the input voltage to the rated voltage and transforms to the DC bus, the multilevel inverter converts the voltage to AC and feeds to AC loads. In this paper, we develop an entire unit stack, which can produce an output with positive and zero sequences. The addition of H-bridge to the fundamental unit known to be an advance cascaded H-bridge multilevel inverter resulting in the formation of all sequences like positive, zero and negative levels. The conventional multilevel inverters are compared with the proposed inverters in terms of switch count, DC sources, diodes, through which the lesser requirement of components in a multilevel inverter is possible to observe, which results in the reduction in cost, dv/dt stress, component space of the driver circuit. With this implementation, the better possibility of control, increase the quality of output, reliability of the inverter with a reduced THD, and stress. The converter output is tested and verified in MATLAB, and the respective results of the different levels like five, seven and fifteen of a single-phase cascaded inverter are tested experimentally and in MATLAB Simulink. INDEX TERMS Multilevel Inverter (MLI), Proton exchange membrane fuel cell (PEMFC), Converter, Total Harmonics Distortion (THD).

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This paper presents a novel topology for the single-phase 31-level asymmetrical multilevel inverter accomplished with reduced components count. The proposed topology generates maximum 31-level output voltage with asymmetric DC sources with an H-bridge. The fundamental 13-level multilevel inverter (MLI) topology is realized, and further, the topology is developed for 31-level can be used for renewable energy applications. This reduces the overall components count, cost and size of the system. Rather than the many advantages of MLIs, reliability issues play a significant role due to higher components count to reduce THD. This is a vital challenge for the researchers to increase the reliability with less THD. Several parameters are analyzed for both fundamental 13-level and developed 31-level MLIs such as total standing voltage (TSV), cost function (CF) and power loss. The inverter is tested experimentally with various combinational loads and under dynamic load variations with sudden load disturbances. Total standing voltage with the cost function for the proposed MLI is compared with various topologies published recently and is cost-effective. A detailed comparison of several parameters with graphical representation is made. Less TSV and components requirement is observed for the proposed MLI. The obtained total harmonic distortion (THD) is under IEEE standards. The topology is simulated in MATLAB/Simulink and verified experimentally with a hardware prototype under various conditions.

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