As an emerging nanotechnology, quantum-dot cellular automata (QCA) has the potential to be used for next generation VLSI. Various designs of combinational logic circuits have been proposed for QCA implementation, but sequential circuit design is limited due to the lack of high-performance QCA flip-flops. After an introduction on QCA and dual-edge triggered (DET) flip-flops, a new QCA DET T flip-flop following a pulsed latch scheme is presented. The proposed T flip-flop is simulated using QCADesigner simulator and its logic functionality is verified. The same data throughput of the DET flip-flop can be achieved while operating at half the clock frequency of a single-edge triggered (SET) counterpart. The proposed flip-flop is promising in building QCA sequential circuits with low power and high performance.