No abstract

In this paper, a built-in supply current test circuit is proposed to detect open defects occurring at interconnects between dies including an IEEE 1149.1 test circuit and locate the defective interconnects in a 3D IC. Feasibility of interconnect tests with the test circuit is examined by some experiments with a prototyping IC in which the test circuit is embedded and bySpice simulation. The simulation results show that a hard open defect, a capacitive open one of 10nF and a resistive open one of 1kΩ can be detected at a test speed of 1MHz per an interconnect.

No abstract

No abstract

No abstract