High Energy Physics (HEP) experiments have unique requirements for data communication. High data speeds, combined with extreme restrictions on materials allowed, leads to custom transmission lines. This paper will present transmission line design theory, simulation and testing methods. Transmission line designs options like flexes and rigid PCBs as well as cables will be studied. Finite Element Analysis (FEA) software packages simulate energy dissipation and quality of transmitted signals. The characterisation techniques of time-domain reflectometry and frequency-domain measurements are discussed and compared. Bit-error-rate testing is presented and its limitations for design discussed. Methods to improve quality, like three different types of equalization are described.
The LHCb Experiment is designed for precision measurements of CP violation and rare decays of beauty and charm hadrons. The experiment will be upgraded to a trigger-less system reading out the full detector at a 40 MHz event rate with all selection algorithms executed in a CPU farm. The upgraded Vertex Locator will be a hybrid pixel detector read out by the VeloPix ASIC with on-chip zero-suppression. The overview of the system and the design of the VELO on-detector electronics that include the front-end hybrid, the opto-conversion and power distribution boards will be summarised. The results from the evaluation of these prototypes and further enhancement techniques will be discussed.
This article describes the high-speed system designed to meet the challenging requirements for the readout of the new pixel VErtex LOcator (VELO) of the upgraded LHCb experiment. All elements of the electronics readout chain will be renewed to cope with the requirement of ∼40-MHz full-event readout rate. The pixel sensors will be equipped with VeloPix ASICs and placed at ∼5 mm from the Large Hadron Collider (LHC) beams in a secondary vacuum tank in an extremely high and nonhomogeneous radiation environment. The front-end (FE) ASICs with the highest occupancy will have to cope with pixel-hit rates above ∼900 Mhits/s using up to four 5.13-Gb/s data readout links. Each module comprises six VeloPix ASICs, wire-bonded to two FE hybrid boards, while a third hybrid will employ a GBTx ASIC as the control interface. High-speed data will reach the wall of the vacuum chamber through low-mass flexible copper tapes. A custom board routes the signals outside the vacuum tank. On the air side, an optical and power board converts the electrical high-speed signals into optical signals for transmission from the underground cavern to the off-detector electronics that process data and send them to a farm of computers for further analysis. Several tests allowing the validation of the system are described here with special emphasis on a test with proton beams that confirms the correct operation of the whole readout hardware.
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