In this letter, we characterize the effect of datadependent gate failures on the performance of the Gallager B decoder of low-density parity-check codes. We show that this type of failures makes the decoder dependent on a transmitted codeword, thus rendering inapplicable the traditional analysis tools such as density evolution and trapping sets. By using Monte Carlo simulations, we identify two operating regions: one in which hardware unreliability leads to significant performance degradation and another in which the performance loss is negligible. Based on these results, we propose a simple modification of the decoder that ensures its fault tolerance.

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A majority logic decoder made of unreliable logic gates, whose failures are transient and datadependent, is analyzed. Based on a combinatorial representation of fault configurations a closed-form expression for the average bit error rate for an one-step majority logic decoder is derived, for a regular low-density parity-check (LDPC) code ensemble and the proposed failure model. The presented analysis framework is then used to establish bounds on the one-step majority logic decoder performance under the simplified probabilistic gate-output switching model. Based on the expander property of Tanner graphs of LDPC codes, it is proven that a version of the faulty parallel bit-flipping decoder can correct a fixed fraction of channel errors in the presence of data-dependent gate failures. The results are illustrated with numerical examples of finite geometry codes.

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