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Simultaneous switching noise (SSN) has become a major bottleneck in high speed digital design. For future systems, modeling SSN can be complex due to the thousands of interconnects that need to be analyzed. This is because a system level modeling approach is necessary that combines the chip, package and board level interactions. This paper presents an efficient method to model the SSN for high speed systems by developing circuit models for the planes and interconnections that can be combined using superposition theory. This approximation is valid at frequencies where skin effect is dominant. Simulation results are compared with the measurements on a test vehicle, verifying the validity of the method. In addition a system has been simulated to compute SSN, showing the application of this method for complex systems.

This paper describes a measurement based approach for extraction of the current signature to simulate switching noise in complex high speed s y s t e m The approach is tested on a high speed functioning computer system from Sun Micrmystems. Using the current source developed, simultaneous switching noise in the core power distribution network of the system has been simulated with good accuracy.

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