We report a unique ability to control the sign and size of the stress within Ge nanocrystals or nanodots fabricated using a complementary metal-oxide-semiconductor-compatible process within SiO2 and Si3N4 layers. Very large (as much as 4.5%), size-dependent compressive and tensile strains can be generated depending on whether the dot is embedded within either a Si3N4 or a SiO2 layer. Raman measurements reveal significant anharmonicity for smaller Ge dots and possible distortions of the diamond cubic lattice as evidenced by the measured Grünesien parameters and confirmed by their transmission electron diffraction patterns. Two completely different mechanisms are proposed to explain the formation of the tensile and compressive strain states, respectively.

We report a first-of-its-kind, unique approach for generating a self-aligned, gate-stacking heterostructure of Ge quantum dot (QD)/SiO2/SiGe shell on Si in a single fabrication step. The 4-nm-thick SiO2 layer between the Ge QD and SiGe shell fabricated during the single-step process is the result of an exquisitely controlled dynamic balance between the fluxes of oxygen and silicon interstitials. The high-quality interface properties of our “designer” heterostructure are evidenced by the low interface trap density of as low as 2–4 × 1011 cm−2 eV−1 and superior transfer characteristics measured for Ge-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Thanks to the very thin interfacial SiO2 layer, carrier storage within the Ge QDs with good memory endurance was established under relatively low-voltage programming/erasing conditions. We hope that our unique self-aligned, gate-stacking heterostructure provides an effective approach for the production of next-generation, high-performance Ge gate/SiO2/SiGe channel MOSFETs.

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