We propose a novel multi-gate CMOS structure having a high mobility channel with optimal strain configuration, realized by appropriately merging globally-strained substrates with lateral strain relaxation technique. We report successful fabrication and operation of uniaxially-strained SGOI Fin and Tri-Gate pMOSFETs. The improved SCE immunity and the performance enhancement are demonstrated.

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We systematically study the mechanism of source and drain parasitic resistance (R SD) reduction in amorphous InGaZnO TFT. Regardless of the S/D processes, R SD reduction is caused by the increase in carrier density. Physical analyses show that the fluctuations of In concentration at the InGaZnO surface are responsible for the enhancement of carrier density. Top-gate InGaZnO TFT fabricated with R SD reduction process shows good short-channel immunity. Short-channel InGaZnO TFT with reduced R SD is promising for high-density back end of line (BEOL) Tr. in Si LSI.