A nanoelectromechanical device incorporating the nanocrystalline silicon ͑nc-Si͒ dots is proposed for use as a high-speed and nonvolatile memory. The nc-Si dots are embedded as charge storage in a mechanically bistable floating gate. Position of the floating gate can therefore be switched between two stable states by applying gate bias. Superior on-off characteristics are demonstrated by using an equivalent circuit model which takes account of the variable capacitance due to the mechanical displacement of the floating gate. Mechanical property analysis conducted by using the finite element method shows that introduction of nc-Si dot array into the movable floating gate results in reduction of switching power. High switching frequency over 1 GHz is achieved by decreasing the length of the floating gate to the submicron regime. We also report on experimental observation of the mechanical bistability of the SiO 2 beam fabricated by using the conventional silicon etching processes.

, where L, T , and Z 0 represent the length, thickness, and equilibrium displacement of the buckled floating gate, respectively. We demonstrate that the switching frequency can be increased while maintaining the switching force when we downscale all the floating gate dimensions proportionally along with the scaling law. We also show that the switching voltage can be reduced down to less than 15 V while maintaining the ON/OFF operation range of the sense MOSFET by optimizing the cavity structure which sustains the inside buckled floating gate.

The static switching properties and readout characteristics of proposed high-speed and nonvolatile nanoelectromechanical (NEM) memory devices are investigated. By conducting a three-dimensional finite element mechanical simulation combined with an electrostatic analysis, we analyze the electromechanical switching operation of a mechanically bistable NEM floating gate by applying gate voltage. We show that switching voltage can be reduced to less than 10 V by reducing the zero-bias displacement of the floating gate and optimizing the cavity structure to improve mechanical symmetry. We also analyze the electrical readout property of the NEM memory devices by combining the electromechanical simulation with a drift-diffusion analysis. We demonstrate that the mechanically bistable states of the floating gate can be detected via the changes in drain current with an ON/OFF current ratio of about 3 Â 10 4 .

Numerical simulation of electromechanical switching for bistable bridges in non-volatile nanoelectromechanical (NEM) memory devices suggests that performance of memory characteristics enhanced by decreasing suspended floating gate length. By conducting a two-dimensional finite element electromechanical simulation combined with a drift-diffusion analysis, we analyze the electromechanical switching operation of miniaturized structures. By shrinking the NEM floating gate length from 1000 to 100 nm, the switching (set/reset) voltage reduces from 7.2 to 2.8 V, switching time from 63 to 4.6 ns, power consumption from 16.9 to 0.13 fJ. This indicates the advantage of fast and low-power memory characteristics. #

IntroductionRecent progress of silicon nanofabrication techniques has enabled to explore a new field of silicon Nano Electro-Mechanical Systems (NEMS) research. Since the characteristic frequency of electromechanical systems, in principle, increases in inverse proportion to their sizes, the NEMS have a possibility of extremely high-speed operation [1]. We proposed a new non-volatile memory device concept based on mechanically-bistable operation of the floating gate (FG) in the cavity, combined with nanocrystalline Si (nc-Si) dots as single-charge storage ( Fig. 1) [2] and analyzed the mechanical and electrical properties by using the finite element simulation [3,4]. In this paper, we analyzed the transient responses of the switching and the readout operations of the NEMS memory by using the 2-D finite element simulation combined structural mechanics, electrostatics and drift-diffusion. Steady-state propertiesThe structure used for the present simulation is shown in Fig.2. Since 3-D simulations require much computing resources, we conducted the 2-D simulation. A silicon layer is used instead of the nc-Si layer for simplicity. We assumed that the surround of the structure was physically fixed. For realistic modeling of the FG, we introduced the internal compressive stress into the suspended beam. We assumed that negative charges are introduced into the silicon layer. The substrate and source were grounded, and the drain voltage was kept at 0.5 V. The gate voltage V g was swept.Under these conditions, we first performed the steady-state analysis to obtain the switching and readout voltages. We calculated the beam displacement and the drain current with changing V g . As the FG is negatively charged, the upward bent state is the ON state (high current) and the downward bent state is the OFF state (low current). As shown in Fig.3, the memory state switched at V g = 6 V and -6.7 V. By assuming the readout voltage of 5.5 V, the ON/OFF current ratio was estimated to be about 10