The latching of temporary data is essential in the Rapid Single Flux Quantum (RSFQ) electronics family. Its pulse-driven nature requires two or more stable states in almost all cells. Storage loops must be designed to have exactly two stable states for binary data representation. In conventional RSFQ such loops are constructed to have two stable states, e.g. by using asymmetric bias currents. This bistability naturally occurs when phase-shifting elements are included in the circuitry, such as-Josephson junctions or a-phase shift associated with an unconventional (-wave) order parameter symmetry. Both approaches can be treated completely analogously, giving the same results. We have demonstrated for the first time the correct operation of a logic circuit, a toggle-flip-flop, using rings with an intrinsic-phase shift (-rings) based on hybrid high-to low-Josephson junctions. Because of their natural bistability these-rings improve the device symmetry, enhance operation margins and alleviate the need for bias current lines.
The reduction of the critical current density in rapid single-flux quantum (RSFQ) circuits
enables new application fields, like quantum computing and photonic detector readout. The
low current density fabrication process creates new design challenges, such as
lower stability against thermal fluctuations, violation of the lumped elements
condition for microstrip inductances and increased sensitivity to the technological
spread. To overcome these issues, we suggest a passive phase shifter as a promising
alternative technique for superconductive phase dropping in the RSFQ electronics.
Here, we study experimentally their applicability in high-speed RSFQ digital circuits.
Conclusions are drawn about the impact of the passive phase shifters on the complexity,
the speed and the bit error rate of the investigated RSFQ circuits. We demonstrate the
successful operation of different circuits with implemented passive phase shifters at low and
high speeds.
The manufacturing process of LTS RSFQ circuits is quite similar to that of the semiconductor chips, thus providing the possibility of an ultra high-density packaging similar to the modern semiconductor logic circuits. However, the miniaturization of the interconnects does not enhance their performance. The present work highlights the impact of the parasitic interactions between the superconductive interconnects on the correct logical functionality and the upper bias current margins of the LTS RSFQ circuits.
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