Motivated by the increasing practical needs for simulation optimization of modern industrial systems, this paper proposes an efficient ranking and selection (R&S) procedure for selecting the best-simulated design from a finite set of alternatives in the presence of large stochastic noise. To obtain the correct selection under a limited simulation budget, the proposed procedure sequentially allocates the budget to minimize the evaluated uncertainty values of the selection through a two-step process based on the existing uncertainty evaluation (UE) procedure. This two-step process reduces the inefficiency of the underlying UE procedure while keeping its high robustness to noise, thereby achieving improved the efficiency for the proposed procedure in a noisy environment. This improved efficiency is demonstrated in comparative experiments with other R&S procedures on several benchmark problems. In particular, the experimental results of three practical optimization problems emphasize the necessity of the proposed procedure.

In these days, many dynamically reconfigurable architectures have been introduced to fill the gap between ASICs and softwareprogrammed processors such as GPPs and DSPs. These reconfigurable architectures have shown to achieve higher performance compared to software-programmed processors. However, reconfigurable architectures suffer from a significant reconfiguration overhead and a speedup limitation. By reducing the reconfiguration overhead, the overall performance of reconfigurable architectures can be improved. Therefore, we will describe temporal partitioning, which are able to amortize the reconfiguration overhead at synthesis phase or compilation time. Our temporal partitioning methodology splits a configuration context into temporal partitions to amortize reconfiguration overhead. And then, we will present benchmark results to demonstrate the effectiveness of our methodology.