Ultrathin oxide films (SiO2, Al2O3,Ta2O5) with a minimum thickness of 2 nm have been deposited at low temperature by electron cyclotron resonance (ECR) sputter utilizing a plasma source coupled with a divided microwave beam. The uniformity of the film thickness was within ±2% over a 150 mm wafer. The surface roughness measured by atomic force microscopy was only 0.48 nm for a 100-nm-thick Al2O3 film. The fixed charge density of the Al/SiO2/Si metal oxide semiconductor capacitors decreased with increasing oxygen flow rate and substrate temperature during SiO2 deposition. A very low fixed charge density of about 5×1010 cm−2 was obtained without annealing the capacitor. The resistivities of SiO2, Al2O3, and Ta2O5 films with thicknesses from 2 to 40 nm were on the order of 1015 Ω cm. Under low electric fields the leakage current was a hopping current and under high electric fields it was a Poole–Frenkel current. The typical dielectric strength was 10 MV/cm for SiO2 and Al2O3 films. A high dielectric constant of 25 was obtained for Ta2O5 films. We think the low energy (10–20 eV) ion irradiation during ECR sputter contributed to the formation of smooth, high-quality oxide films.

Intentionally oxygen‐doped Mo films false(MoOxfalse) for MOS gate electrodes are investigated to eliminate the penetration of implanted As ions into the silicon substrate through the gate electrodes and gate oxides. The MoOx films are prepared by reactive sputtering of Mo in a mixture of Ar and O2 gases. Depth profiles of As ions and MOS C‐V curves are measured to estimate stopping properties. For as‐deposited MoOx films, whose oxygen concentrations are higher than 20 atom percent (a/o), As ion penetration depth is within 0.15 μm under 100 keV As ion implantation. This depth is about one third of that in normal Mo films. This excellent stopping property can be attributed to the nearly amorphous structure, which suppresses As ion channeling in the films resulting from oxygen doping. The resistivity of MoOx films with 39 a/o oxygen after annealing at 1000°C for 30 min is 25 μΩ‐cm, which is only three times as large as that for normal Mo films. In MoOx gate MOS structures, MOS characteristics are independent of oxygen concentrations in the films, and are almost the same as the characteristics for normal Mo gate electrodes.

The surface states of molybdenum (Mo) gate metal oxide semiconductor (MOS) devices have been examined and Mo penetration into the Si-Si02 interface during Mo film deposition has been confirmed to be one of the causes of surface state generation. Penetration of Mo atoms occurs when the substrate is heated during deposition by sputtering or electron-beam evaporation. The mechanism responsible for the penetration is assumed to be caused by Mo ions on the Si02 surface during the initial stages of deposition. To prevent this Mo penetration, a very thin Mo film is first deposited at room temperature to form a conductive layer, and a thick Mo film is subsequently deposited at high temperature. By applying th:Ls two-step deposition method, the penetration depth of Mo into the Si02 can be reduced to less than 3 nm and the surface state density can be reduced to below 3 X 1010 cm2 eV even in MOS devices with a gate oxide thickness of 10 nm.

Tantalum (Ta) and tantalum nitride (TaN) films deposited by electron cyclotron resonance (ECR) sputtering have been investigated as barriers to Cu diffusion in very large scale integrated interconnections. An ECR plasma source coupled with divided microwaves was used to deposit Ta and TaN films. The addition of N2 to Ar enabled the ECR TaN film to be easily deposited by using a Ta metal target at low temperature without external substrate heating. To investigate the barrier characteristics, sample with Cu/ECR–Ta/SiO2 and Cu/ECR–TaN/SiO2 structures were heat treated in Ar at 550 and 650 °C, respectively, and analyzed by secondary ion mass spectroscopy, which determined the Cu diffusion density. The normalized signal intensity ratio of Cu to Si at the interface between the barrier metal and SiO2 was 0.035 for the ECR TaN film and 0.087 for the ECR Ta film, but 0.26 for the rf-sputtered TaN film. ECR sputter deposited films had excellent characteristics for use as barriers to Cu diffusion.

The applications of metal chemical vapor deposition (CVD) technology in the large-scale integrated circuit metallization process have in recent years expanded rapidly because it results in good step coverage and good hole filling. The deposition/etchback process of CVD-W is widely used for making contact and via plugs in logic interconnections. 1 Polycide gate electrodes of metal-oxide-semiconductor (MOS) devices are made by using CVD to deposit WSi X (tungsten silicide) on poly-Si (polycrystalline silicon), 2 and the CVD of TiN (titanium nitride) and Ti is being investigated with the intention of utilizing seed, barrier, and contact layers in small holes. 3,4 Metals with a low melting point and a low resistivity, such as Al and Cu, which are the conducting materials usually used for large-scale integrated (LSI) interconnections, have, conventionally, been deposited by sputtering, but the CVD of these has recently become of interest because of their use in the Damascene interconnect in which metal lines and via plugs are formed by filling narrow trenches and small holes with a highly conductive metal. 5 The first attempt to use the CVD of Al in the LSI metallization process was reported in 1982 by Cooke et al. 6 and a series of investigations using triisobutyl aluminum (TIBA) as the source gas has been carried out by a group in Lucent Technologies, Bell Laboratories. 7 The resultant films, however, had rough surfaces, and the roughness was thought to be a necessary consequence of the nucleation and growth mechanisms. Surface roughness has prevented the practical use of Al films grown by CVD because it degraded the electromigration reliability of interconnections and interfered with the fine patterning of Al lines by photolithography. 8 In 1986, a colleague and I reported that Al can be deposited selectively on a silicon substrate, 9 and the surface morphology of the selectively deposited films has since been greatly improved by using a double wall CVD system. 10 This selective deposition technology has been used in the fabrication of multilevel interconnection structures with submicrometer via holes. [11][12][13] This paper reports on the features of the selective Al deposition using the double wall CVD system, discusses the growth process of smooth Al films, and describes the properties of the Al films deposited. ExperimentalDouble wall CVD system.-As shown schematically in Fig. 1, a double wall CVD system has two heaters in the deposition chamber. The substrate surface on which a film is to be deposited faces the front heater, and the temperature of the front and back heaters (T F and T B ) can be varied independently between room temperature and 500ЊC. The distances (D F and D B ) between the substrate and the heaters (typically 5 mm) are also variable independently.The sample is moved from the load lock chamber into the deposition chamber, which is then evacuated to 10 Ϫ6 Torr (10 Ϫ4 Pa) by a turbomolecular pumping system. Then the inner chamber is sealed off and Al is deposited when TIBA is introduced. Durin...