In this paper, a novel multi-target design methodology based on the concepts of transformational design, and its application to the interlaced-to-progressive scan conversion (IPSC) problem, are discussed. Starting from a single high-level behavioral specification in VHDL a direction detector used in IPSC adgorithms is mapped onto both a custom implementation and a programmable video signall processor. Results are compared with those previously obtained using different tools and methodologies. 3.4.1 IEEE 1995 CUSTOM INTEGRATED CIRCUITS C0NFE:RENCE ' SIL was developed in cooperation with Philips Research and IMEC as part of the ESPRITBPRITE project 2260.

This paper describes a simple and powerful input language (intermediate format) for high level synthesis. The language belongs to the class of signalflow grapha. The Sprite Input Language (SIL) encompasyzs both the applicative constructs on which classical DSP languages like Silage are based, the functional constructs from hardware description languages like ELLA, and the operational constructs from sequential languages like Pascal and C. This is obtained b y means of the single token flow model and using sets instead of single values for modelling data. The language is suited for acting as intermediate language between the various specification languages and the silicon compilation system, as well as language backbone in the synthesis part of a silicon compiler.

In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, the tasks to be executed by each core are determined in a structured way using techniques known from the design of array processors. In the second step, the implementation of tasks on a processing core is analysed. Using this methodology, it is shown that calculating a 127 × 127 Discrete Spectral Correlation Function requires approximately 140 µs on a tiled System on Chip (SoC) with 4 Montium cores.

This paper' presents a new class of synchronow deterministic non-authenticated algorithms f o r reaching interactive consistency (Byzantine agreement). The algorithms are based on voting and enor-correcting system at most T modules behave maliciously, this algorithm is said to fulfill the interactive consistency requirements when the following conditions are fulfilled, regardless of which modules are faulty and what data was sent by the source: codes and require considerably less data communication than the original algorithm, whereas the number of rounds and the number of modules meet the minimum bounds. These algorithm based on voting and The well-functioning modules agree among each other on the data they think they have received from the source. coding will be defined and proved on the basis of a class of algorithms, called the Dispersed Joined Communication algorithms. If the source is well-functioning, the abovementioned agreement should equal the data actually sent b y the source. 'The work described in this paper has been carried out at the Philips Research Laboratories Eindhoven rm a part of the In this paper we will focus on synchronous deter

SIL (SPRITE Input Language) is a single token signal flow graph representation developed as an intermediate format between specification languages and siliconcompilers. This paper presents a part of a ,formal semantic model for SIL which is nicely intuitive because of the use of tables as mathematical representation of the semantics. Together with this semantic model SIL becomes a useful language backbone for transformational design.